17–19 Mar 2020
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
NEW!!! SEFUW 2023!!! The 2020 edition was postponed. Presentations and abstracts are left here for reference. Please check the 2023 edition of SEFUW at https://indico.esa.int/event/439/

3D PLUS CONFIGURATION MEMORY SOLUTIONS

19 Mar 2020, 14:15
10m
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands
Reconfiguration Memories

Speaker

Mrs Jeanne TONGBONG

Description

Most of the latest High-End FPGAs are SRAM-based. They present high performance, high density (more configurable resources), high flexibility (partial reconfiguration and thus are widely deployed in space applications primarily for payload type applications. The SRAM-based FPGAs require a configuration memory to reload the configuration pattern when powered-on. The main requirement for a configuration memory is reliability through the mission lifetime. It has to have zero error otherwise; the FPGA functionality can change. This translated into radiation requirements for device bitstream storage would be:
• TID dependent on mission requirements
• Single Event Latchup (SEL) immunity
• Single Event Upset (SEU) immunity
• Single Event Functional Interrupt (SEFI) immunity.
Latest High-End FPGAs requires increasingly larger configuration images. For example, NanoXplore Medium requires a bitstream of +50 Mbit, while XilinX KU060 requires 192 Mbit of bitstream length. High density is now a requirement for configuration memory as well as radiation tolerance, reliability, data integrity and security.
In this topic 3D PLUS will presents latest products and plan for the near future. Responding to the requirements detailed above. They are:
• 128 Mbit TMR (Triple Modular Redundancy)SPI NOR Flash
• 256 Mbit TMR Radiation Intelligent QSPI NOR Flash
• SOI Based MRAM with SPI Interface

Primary author

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