17-19 March 2020
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
UPDATE 02 March 2020: please be informed that SEFUW has been postponed. More information will be posted here in due course.

Xilinx Zynq Ultrascale+ MPSoC-based modular unit for rapid spacecraft hardware prototyping

19 Mar 2020, 15:40
25m
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands
Industrial Experiences Industrial Experiences

Speaker

Mr Michael Walshe (Thales Alenia Space)

Description

Thales Alenia Space in the UK have developed a modular unit for rapid spacecraft system prototyping based on the Xilinx Zynq UltraScale+ MPSoC. The unit is delivered in Compact PCI (CPCI) form factor and supports a mixture of Space and Terrestrial TM/TC and Data interfaces:
• SpaceWire x 3
• SpaceFibre x 2
• CAN x 2
• 1553 x 2
• RS422 UART x 2
• Gigabit Ethernet x 2
• USB2.0/3.0 x 4

The CompactPCI Carrier Card functionality can be extended and tailored via an industry-standard FPGA Mezzanine Connector (FMC) which allows expansion cards with additional functionality to be used. A project-specific Mezzanine Module has been developed that includes opto-isolated trigger drivers for cameras, thermistor acquisition and additional TM/TC and Data interfaces.

In the context of H2020, the unit is being used as a rapid development platform for autonomous Space Robotics demonstrators based on a mixture of low and high TRL sensors.

The first release of the unit has been developed under the Horizon 2020 Integrated 3D Sensor Suite (I3DS) programme. The unit has been further developed under the H2020 European Robotic Orbital Support Services (EROSS) and Planetary Robots Deployed for Assembly and Construction (PRO-ACT) programmes.

The unit is a good starting point for understanding how to approach development with the next generation of Space Grade MPSoC FPGAs such as the NanoXplore NG-ULTRA.

The MPSoC architecture of the UltraScale+ with its quad core ARM A53 application processors, dual core ARM 5 real time processors and extensive FPGA fabric with AXI interconnect is complex. It requires a steep learning curve, and the robotics application of the technology for I3DS, EROSS and PRO-ACT with the lessons learned will be presented.

Primary author

Mr Michael Walshe (Thales Alenia Space)

Co-authors

Mr Joseph Purnell (Thales Alenia Space) Mr Philip Perryman (Thales Alenia Space) Mr Roger Ward (Thales Alenia Space)

Presentation Materials

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