Speaker
Description
New Space applications require more compactness, and modularity, in a global context of increasing overall performances. During 2018 SEFUW conference, we introduced the concept of our Computer Core FUSIO RT project under CNES R&T activity. The goal of the presentation is to provide with the latest information related to this solution (available since 2019) in terms of technology and caracteristics, fitting Space environment constraints.
FPGA-based computer unit is common in Space designs thanks to FPGA’s high flexibility, high performance and its short time to market an affordable price.
In most computer board or processing units, designs require FPGA with reliable configuration memory, computing memory and storage memory.
FUSIO RT is a new family of Computer Cores providing several different modules with basic structure (FPGA + configuration memory: SPI NOR TMR) with or without additional memories such as storage memory (NAND) and/or computing memory (SDRAM).
Providing such kind of modular Computer Core brings key benefits, such as:
• reducing drastically the size of the overall system,
• lower the overall weight,
• providing basic technologic bricks, ready to use
• design easy to upgrade (tools & form factor compatible)
• all embedded functions radiation proven
• speeding up development by using FUSIO RT
In this update, we will focus in particular on new available tools and solutions related to the use of the FUSIO RT family such as power management, Development Kit and tools for a quick and easy start prototyping.
