SEFUW: SpacE FPGA Users Workshop, 5th Edition

from Tuesday, 17 March 2020 (09:15) to Thursday, 19 March 2020 (17:00)
European Space Research and Technology Centre (ESTEC) (Newton 1 and 2)

        : Sessions
    /     : Talks
        : Breaks
17 Mar 2020
18 Mar 2020
19 Mar 2020
AM
09:15 --- Registration and Networking Coffee Break ---
10:00
Industrial Experiences (until 11:40) (Newton 1 and 2)
10:00 Challenges with New FPGA Technologies - Isaac Tejerina Bustillo (Airbus Defence & Space)   (Newton 1 and 2)
10:25 MPSOCS FOR RECONFIGURABLE MODULAR SPACECRAFT - Matthew Rowlings (Staff)   (Newton 1 and 2)
10:50 Development and FPGA Roadmap for LEON5FT and NOEL-V Processor Models - Mr Martin Ronnback (Cobham Gaisler)   (Newton 1 and 2)
11:15 SpaceFibre and SpaceWire IP cores for radiation tolerant FPGAs - Dr Chris McClements (STAR-Dundee) Steve Parkes (STAR-Dundee)   (Newton 1 and 2)
11:40
Design Flow (until 13:00) (Newton 1 and 2)
11:40 Getting Started with OSVVM, VHDL's #1 Verification Methodology - Jim Lewis (SynthWorks Design Inc.)   (Newton 1 and 2)
12:10 Using Static RTL Analysis to Accelerate Space FPGA Verification - Mr adam adam taylor (Adiuvo Engineering & Training Ltd)   (Newton 1 and 2)
12:35 A UML Profile for VHDL FPGA Designs. - Mr Harald Ottacher (Space Research Institute / Austrian Academy of Sciences)   (Newton 1 and 2)
08:50 --- SEFUW Intro - Opening Remarks ---
09:00
Fault Tolerance Methodologies and Tools (until 10:30) (Newton 1 and 2)
09:00 Webex session: Methods for Mission-Critical Survivability Analysis - Ms Melanie Berg (Space R2 LLC)   (Newton 1 and 2)
09:50 Methodologies and tools to efficiently perform fault campaigns to measure functional safety - Mr Joerg Richter (Group Director R&D, Verification Group)   (Newton 1 and 2)
10:10 Configuration Memory Scrubber for the Xilinx Zynq-7000 FPGA based on a 2D coding scheme - Mihalis Psarakis (University of Piraeus, Greece)   (Newton 1 and 2)
10:30
Reconfiguration (until 11:20) (Newton 1 and 2)
10:30 FPGA Based Reconfigurable On-Board Payload Processing for an Exploratory In-Orbit Verification of an E-Band (71-76 GHz) Satellite Link (EIVE) - Ms Laura Manoliu (University of Stuttgart)   (Newton 1 and 2)
10:55 Use of Cyclone V SoC in OPS-SAT mission of ESA - Vasundhara Shiradhonkar   (Newton 1 and 2)
11:20 --- Networking Coffee Break ---
11:50
Design Flow (until 13:00) (Newton 1 and 2)
11:50 FPGA continuous integration - Florent MAnni (DC/TV/IN)   (Newton 1 and 2)
12:10 UVVM usage is exploding. A brief introduction and all the new stuff for this standardised VHDL verification methodology. - Mr Espen Tallaksen (Bitvis)   (Newton 1 and 2)
12:40 Accelerating the Journey from C/C++ to Hardware - Mr Pantelis Sarais (Silexica)   (Newton 1 and 2)
08:50 --- SEFUW Intro - Opening Remarks ---
09:00
FPGA Vendors (until 10:00) (Newton 1 and 2)
09:00 NanoXplore NXmap-v3 features and updated NX products portfolio - Mr JOEL LE MAUFF (NanoXplore)   (Newton 1 and 2)
10:00
Fault Tolerance Methodologies and Tools (until 10:50) (Newton 1 and 2)
10:00 Fault tolerance analysis of iterative processing data-paths - Dr Alexandru Amaricai (University Politehnica Timisoara)   (Newton 1 and 2)
10:25 Radiation tolerant CAN controller for Xilinx FPGAs - Simon Voigt Nesbo (Western Norway University of Applied Sciences)   (Newton 1 and 2)
10:50 --- Networking Coffee Break ---
11:20
Artificial Intelligence/Machine Learning (until 13:00) (Newton 1 and 2)
11:20 Xilinx Machine Learning Solutions and Design Considerations for Space Applications - Mr Jason Vidmar (Xilinx Corp)   (Newton 1 and 2)
11:45 Image Recognition for Space Applications using Deep Learning on FPGAs & SoCs - Stephan van Beek (MathWorks)   (Newton 1 and 2)
12:10 FPGA implementation of Cloud Detection algorithm based on Convolutional Neural Network for Earth Observation applications On board - Mr Giamarco Dinelli (University Of Pisa) Mr Gionata Benelli (IngeniArs)   (Newton 1 and 2)
12:35 Intel’s Solution for Fast and Efficient Inference - Ms Ruth Abra (Intel)   (Newton 1 and 2)
PM
13:00 --- Networking Luncheon ---
14:00
FPGA Vendors (until 15:00) (Newton 1 and 2)
14:00 Saving Power and System Cost with Microchip Radiation Tolerant FPGAs - Mr Ken O'Neill (Microchip Technology)   (Newton 1 and 2)
15:00
Fault Tolerance Methodologies and Tools (until 16:30) (Newton 1 and 2)
15:00 Automation of achieving Functional Safety and Highly Reliable Design - Mr Philipp Jacobsohn (Synopsys GmbH)   (Newton 1 and 2)
15:20 Harsher-than-space: Fault injection and user-based RHBD in the age of rad-tolerant and rad-hard devices - Hipólito Guzmán-Miranda (Universidad de Sevilla)   (Newton 1 and 2)
15:45 VeriPy: A Python Framework for the analysis and mitigation of soft-errors effects in SRAM-based FPGAs - Dr Corrado De Sio (Politecnico di Torino)   (Newton 1 and 2)
16:00 Accurate Estimation of NXmap Circuit Performance and Reliability by Static Analysis and Simulation - Prof. Luca Sterpone (Politecnico di Torino)   (Newton 1 and 2)
16:15 New extensions for the LEON2FT IP core - Dr Martin Danek (daiteq)   (Newton 1 and 2)
16:30 --- Networking Coffee Break ---
17:00 --- Demo Session/Exhibit and Welcome Reception ---
13:00 --- Networking Luncheon ---
14:00
FPGA Vendors (until 15:00) (Newton 1 and 2)
14:00 Xilinx’s Adaptive FPGAs for Space Applications - Ms Minal Sawant (Xilinx Inc.)   (Newton 1 and 2)
15:00
FPGAs: High Performance (until 16:15) (Newton 1 and 2)
15:00 Computer Vision Acceleration on NG-MEDIUM and NG-LARGE FPGAs for Rovers - Dr George Lentaris (National Technical University of Athens, Greece)   (Newton 1 and 2)
15:25 Modulable architecture for image processing systems - Mr Rubén Domingo Torrijos (GMV)   (Newton 1 and 2)
15:50 Performance Assessment of Onboard CCSDS Forward Error Correction on Space FPGAs - Nektarios Kranitis (Dept. of Informatics & Telecommunications, National and Kapodistrian University of Athens)   (Newton 1 and 2)
16:15 --- Networking Coffee Break ---
16:45
FPGAs: High Performance (until 17:35) (Newton 1 and 2)
16:45 RTG4 FPGA in ATHENA WFI - Dr Markus Plattner (Max Planck Institute for extraterrestrial Physics)   (Newton 1 and 2)
17:10 The data processing unit for the PMI instrument aboard the Lagrange mission - Juan Pedro Cobos Carrascosa (Institute of Astrophysics of Andalusia)   (Newton 1 and 2)
17:35 --- Round Table ---
19:30 --- SEFUW Dinner ---
13:00 --- Networking Luncheon ---
14:00
FPGA Vendors (until 14:15) (Newton 1 and 2)
14:00 FUSIO RT update: First European Space Computer Core, Ready to use - Mrs Coralie Dang Feller (3DPLUS)   (Newton 1 and 2)
14:15
Memories (until 14:35) (Newton 1 and 2)
14:15 3D PLUS CONFIGURATION MEMORY SOLUTIONS - Mrs Jeanne TONGBONG   (Newton 1 and 2)
14:25 High Performance Memories To Augment Space FPGA s - Dr Helmut Puchner (Cypress Semiconductor)   (Newton 1 and 2)
14:50
Industrial Experiences (until 16:30) (Newton 1 and 2)
14:50 First Design-In Experiences and Comparison of KU060, NG-ULTRA and RTPolarFire for On-Board Processing and AI - Dr Rajan Bedi (Spacechips)   (Newton 1 and 2)
15:15 Flexible FPGA Architecture for Compact High-Performance PDHU and OBC Mass Memory - Dr Gang Zhou (DSI Aerospace Technologie GmbH )   (Newton 1 and 2)
15:40 Xilinx Zynq Ultrascale+ MPSoC-based modular unit for rapid spacecraft hardware prototyping - Mr Michael Walshe (Thales Alenia Space)   (Newton 1 and 2)
16:05 Designing a low-latency Fail-operational motor controller for space on industrial-grade FPGAs - Aloïs Wolff (Watt&Well)   (Newton 1 and 2)
16:30 --- Concluding remarks and closure ---