indico will be upgraded to the latest version on Tuesday 10th Decmeber. It may be unavailable all day.

31 May 2022 to 3 June 2022
Círculo de Bellas Artes of Madrid
Europe/Madrid timezone

100/1000Mbps Space-Qualified PHY for TTEthernet Data Network in Gateway

2 Jun 2022, 12:00
25m
Círculo de Bellas Artes of Madrid

Círculo de Bellas Artes of Madrid

42, Alcala Street 28014 Madrid
Space applications for analogue and mixed-signal ICs Space Applications for analogue and mixed-Signal ICs

Speakers

Mr Nicolas Ganry (Microchip Technology)Mr Thomas Lampl (TTTech Computertechnik AG )

Description

Ethernet is becoming more common in spacecraft to enable hardwired communication speed, support higher data rates, and facilitate interoperability between satellites and other spacecraft. As Ethernet in space applications continues to expand, Microchip Technology has introduced a space-qualified Ethernet transceiver.

In the presentation, Microchip will introduce the VSC8541RT, European radiation tolerant Gigabit Ethernet PHY developed in collaboration with the CNES. Microchip will explain the qualification and radiation activities held during the qualification of the product and a review of the ceramic and plastic quality flow will be detailed.

TTTech Aerospace develops TTEthernet network platform devices to enable the design of fault-tolerant and reliable network system architectures for deep space missions. TTTech will present the usage and validation of Space Qualified PHY in a reference TTEthernet design (SONIC) for Gateway.

With Rad Tolerant space qualified Ethernet Gbit PHY implemented in a TTEthernet Equipment reference design, Microchip and TTTech are providing a full system implementation which demonstrates the performances of the Ethernet Physical Layer device. This reference design is a good starting point to enable any TTEthernet system development for space applications like Lunar Gateway communication interface.

Primary authors

Mr Jérôme Bourguignon (Microchip Technology) Mr Nicolas Ganry (Microchip Technology) Mr Christoph Larndorfer (TTTech Computertechnik AG)

Co-authors

Mr Ivan Masar (TTTech Computertechnik AG) Mr Thomas Lampl (TTTech Computertechnik AG )

Presentation materials