This paper presents a flexible Single Event Effect (SEE) test system designed to detect and record Single Event Upsets (SEU), Single Event Transients (SET), Single Event Functional Interrupts (SEFI) and Single Event Latch-ups (SEL) that may arise in digital and mixed-signal ICs from irradiation by heavy ions. The test system is based on a digital core synthesized on an FPGA, a Cortex-M3...
The DARE65T platform is an analog/mixed signal RAD-hard platform based on TSMC 65nm RF/LP technology. It includes an extensive variety of library cells like standard cells, IO, Single and Double Port RAM, PLL, ADC and DAC, bringing the first advanced node sibling to the DARE platform family.
This paper introduces a test vehicle, developed to validate functionality, perform electrical...
This paper presents the measurement results of Single-Event Transients (SET) in a commercial 65nm CMOS technology. The heavy-ion test campaign measured both total SET ionized charge and SET pulse duration. In this test chip, single transistors of different types and dimensions were implemented as victim devices. SET variation due to different supply voltages also was investigated. The detailed...
