Speaker
Description
GMV proposes a model-based approach for deep learning (DL) acceleration on FPGAs, taking on-board space debris detection as the target application. GMV has developed G-Theia1 smart-sensor integrating camera and high-performance processing logic into an embedded payload system. G-Theia1 is first proposed as a cost-effective space-based surveillance system in the project H038.3 SBSS-GNSS. Extending the work done in SBSS-GNSS, GMV shows a proposed model-based flow where deep learning models are defined and trained using PyTorch , later exported to ONNX and finally converted directly into register transfer level code (RTL). It leverages Nngen, a fully open-source tool, to implement different deep learning accelerators for image classification and object detection into a dedicated flow being demonstrated on the FPGA fabric of the System-on-Chip Zynq Ultrascale+ MPSoC . To allow for a flexible deployment and facilitate testing, dynamic partial reconfiguration is used to switch between different accelerators in runtime.
The service delivered by spacecrafts can be improved and maintained over time if updates can be applied to the system, increasing the spacecraft's lifetime. The In-Flight Maintenance for System-On-Chip based computer (IFMSOC) ESA project aims to propose safe and secure procedures for modifying the functions performed by a spacecraft after its deployment into a reprogrammable HW/SW architecture. These procedures solve the in-flight management of binaries associated with system updates, the consistency check of HW and SW applications in the context of heterogeneous reconfigurable SoCs, the application of updates, and error handling. The generic architecture solves the applicability of both HW and SW updates allowing its usage in hybrid devices which combine embedded processors with HW-based engines such as FPGAs. A particular interest of the proposed maintenance system for SoCs is the configuration management and HW/SW dependencies, as it is a key factor in avoiding problems of updated patches with functions split or triggered in between FPGA side and SW processing functions.
Generally traditional computer vision algorithms are used in space to solve detection and tracking problems during flight, but recently deep learning (DL) approaches have seen widespread adoption in non-space related applications for their higher accuracy. This trend was enabled by the development and adaptation of hardware architectures to accelerate machine learning workloads, such as DSPs, VPUs, TPUs, GPUs and FPGAs. Due to the possibility of rad-tol/rad-hard HW reconfiguration and parallelism, as well as their higher performance per watt with respect to GPUs or other devices, FPGAs have been used to accelerate computations in space. Given the complexity of current DL models and FPGA development, the abstraction provided by model-based engineering methods allow for greater productivity in the implementation of DL accelerators. The implemented models are ResNet, DenseNet and SqueezeNet with slight modifications to perform object localization.
