Speakers
Description
SpaceWire (ECSS-E-ST-50-12C) is a data-handling network for use on-board spacecraft, which interconnects instruments, mass-memory, processors, downlink telemetry, and other on-board sub-systems. SpaceWire is simple to implement and has some specific characteristics that help it support data-handling applications in space. SpaceFibre (ECSS-E-ST-50-11C) is an evolution of SpaceWire, being backwards compatible with SpaceWire at the packet level. SpaceFibre is a very high-performance, high-reliability and high-availability network technology specifically designed to meet the needs of modern space applications where very high throughput is required. It provides point-to-point and networked interconnections at Gigabit rates— more than 6.25 Gbit/s per lane for current FPGAs, with multi-lane links reaching up to 16 times the speed of a single lane —with Quality of Service (QoS) and Fault Detection, Isolation and Recovery (FDIR). SpaceFibre NORBY and OPS-SAT technology demonstrators have already flown SpaceFibre, with more missions in both Europe and the USA currently designing or planning to use SpaceFibre.
STAR-Dundee has developed a complete family of SpaceWire and SpaceFibre IP cores which are fully compliant with these ECSS standards. This family is composed of SpaceFibre Single-Lane and Multi-Lane Interface and Routing Switch cores, SpaceWire Interface and Routing Switch cores, and RMAP Target and Initiator cores.
A new generation of radiation-tolerant FPGAs is emerging to cope with the ever-growing processing power required by newer missions. Microchip has released the PolarFire RTPF500, Xilinx the Versal XQRVC1902, and NanoXplore the BRAVE NG-Ultra. SpaceFibre operation requires serial transceivers, which are already inbuilt into modern FPGAs. The SpaceFibre IPs have been adapted to take advantage of the specific transceivers and memory blocks offered by these new FPGAs.
In this work, we analyse in detail the performance of STAR-Dundee SpaceWire and SpaceFibre IP cores on this new generation of FPGAs and consider several performance metrics, e.g. maximum speed, resource usage, etc. We also compare the performance of the IPs with current state-of-the-art space-grade FPGAs, i.e. Microchip RTG4 and Xilinx Kintex UltraScale XQRKU060. This analysis can also be used as a representative benchmark to compare the performances of the different FPGAs available for space.
Finally, the STAR-Tiger SpaceFibre routing switch is presented. The STAR-Tiger is the primary element of the payload data-handling network for the Hi-SIDE project, a European Union project carried out by several leading aerospace organisations from across Europe aiming at developing satellite data-chain technologies for future Earth observation and Telecommunication systems. The STAR-Tiger is used for transferring data at high data rates among the different elements of the network. It provides 10 SpaceFibre Multi-Lane ports (4-lane and 2-lane) with an aggregated user data throughput of 230 Gbit/s. It has been implemented using a Xilinx KU060 and the total power consumption of the unit is lower than 15 W at 20 C.
