Keynote #1 - 16th June
"Extreme-Environment ASIC Design for Scientific Instruments" - Soumyajit Mandal (Brookhaven National Laboratory)
This talk will provide an overview of recent work at Brookhaven National Laboratory (BNL) on analog and mixed-signal application-specific integrated circuits (ASICs) designed to operate reliably in extreme environments (high-radiation, cryogenic, or high-temperature). Several examples of such ASICs and their use cases in various high-energy and nuclear physics experiments will be discussed. One case study will focus on the design and testing of front-end CMOS ASICs operating at liquid argon temperature (85K) for the Deep Underground Neutrino Experiment (DUNE). These chips provide low-noise charge readout within noble-liquid time projection chambers (TPCs) that aim to reconstruct the three-dimensional trajectories of incident particles and/or their energy distribution with high spatial, temporal, and energy resolution. As another example, a serial-powered architecture and associated radiation-hardened ancillary ASIC in partially-depleted silicon-on-insulator (PDSOI) technology will be discussed for interfacing to large-area monolithic active pixel sensors (MAPS). Arrays of such large-area MAPS are being developed for high-precision particle tracking within the ePIC detector of the planned Electron Ion Collider (EIC). Finally, the design of adaptive line driver ASICs with configurable pre-emphasis will be discussed for wired data transmission across ultra-thin radio-pure cables. Such high-loss cables are required to read out cryogenic detectors immersed in noble liquids (liquid argon or xenon) for a variety of rare-event physics experiments. Potential applications of the proposed ASICs to space-borne experiments will also be discussed if time permits.
About the speaker: Soumyajit Mandal (Senior Member, IEEE) received the B.Tech. degree from the Indian Institute of Technology (IIT) Kharagpur, India, in 2002, and the Ph.D. and S.M. degrees in electrical engineering from Massachusetts Institute of Technology (MIT), Cambridge, MA, USA, in 2004 and 2009, respectively. He was a Research Scientist with Schlumberger-Doll Research, Cambridge, MA, USA (2010–2014); an Assistant Professor with the Department of Electrical Engineering and Computer Science, Case Western Reserve University, Cleveland, OH, USA (2014–2019); and an Associate Professor with the Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA (2019–2021). He is currently a member of the Research Staff with the Instrumentation Department, Brookhaven National Laboratory, Upton, NY, USA, where he leads the Extreme Environments Research Group. He has over 175 publications in peer-reviewed journals and conferences and has been awarded 26 patents. His research interests include analog and biological computation, magnetic resonance sensors, low-power analog and RF circuits, and precision instrumentation for various biomedical and sensor interface applications. He was a recipient of the President of India Gold Medal in 2002, the MIT Micro-systems Technology Laboratories (MTL) Doctoral Dissertation Award in 2009, the T. Keith Glennan Fellowship in 2016, and the IIT Kharagpur Young Alumni Achiever Award in 2018.
Keynote #2 - 17th June
"RF-sampling ADCs for next-generation wireless applications" - Jorge Lagos (IMEC)
About the speaker: Jorge Lagos received the B.Sc. degree in Electronics Engineering from Pontificia Universidad Católica del Perú (PUCP), in 2003, and a joint M.Sc. degree in Nanotechnologies for Integrated Systems from Politecnico di Torino, Institut Polytechnique de Grenoble, France, and École Polytechnique Fédérale de Lausanne, in 2013. He received the Ph.D. degree in 2019 from Vrije Universiteit Brussel, for his work on high-performance, power-efficient ADCs, in collaboration with IMEC.
From 2004 to 2014, he occupied several Research Assistant positions with focus on various topics. From 2004 to 2006, he was with PUCP, researching analog VLSI networks for channel decoding. From 2006 to 2011, he was with Politecnico di Torino, working on chip-level electromagnetic compatibility and system-on-chip functional test. From 2012 to 2014, he was with the Fraunhofer Institute for Integrated Circuits, focusing on front-end design for MEMS sensors. In 2018 he joined IMEC, where he is currently a Principal Member of Technical Staff conducting research in analog and mixed-signal IC design.
Dr. Lagos was a co-recipient of the 2019 ISSCC Lewis Winner Award for outstanding paper, and of the 2023 IEEE SSCS Brokaw Award for circuit elegance, for his work on ring amplification. He currently serves on the technical program committee for the IEEE Symposium on VLSI Technology and Circuits.
