Speaker
Francis ANGHINOLFI
(CERN)
Description
The High Energy Physics experiments at CERN are preparing their detector upgrades for the period 2023-2025. Because of the increase of the luminosity by a factor around 7 coupled to large instantaneous events multiplicity, the most internal detectors (trackers) will have to be replaced, whereas for other detectors (calorimeters, muon detectors) the electronics should be exchanged to accommodate new data rates. The data volume increase is shared between defining higher detector segmentations (more readout channels) and higher rates per readout channel. The 65nm commercial technologies have been identified as the possible technology node for the development of the new readout ASICS for these experiments upgrades. The very high density offered by these technologies is beneficial for the design of the future pixel detectors, that require on-chip complex data processing across very small size pixels (50umx50um range). The characteristics of transistors are enough to reach 10 to 12 Gb/s data rates on the optical links to transmit data from the detectors to the external data acquisition systems. Various evaluations related to radiation effects have been made on the candidate 65nm technology, including very high total ionising dose up to several hundred of Mrads.
Degradations effect have been observed that affect mainly the PMOS transistor at relatively high ionising dose. Complex dependencies to dose rate and temperature annealing are currently analysed. Based on transistor measurements, new parameters for both the P and NMOS transistor behaviours at 200Mrads and 500Mrads have been introduced. They are fitted to the W and L size, and actually used to
predict the transistor geometries for new digital standard cell libraries. At the same time the evaluation of basic analogue circuits has started under the framework of the RD53 collaboration at CERN, that aims for the definition of advanced pixel detectors and readout systems.
Test circuits that include bandgap references, I/O cells, various analogue circuits have been developed and some of them tested to radiations. More complex circuits, targeted to pixel detector readout, are also in preparation within the RD53 collaboration, that groups institutions and universities from the High Energy Physics community.
An overview of the current organisation of the effort to assess the 65nm technology for the upgrade of the LHC detectors will be presented, as well as the model of organisation that has been defined to access to the foundry and to the advanced CAE tools for multi-million transistors mixed-signal ASIC designs in 65nm technology.
Primary author
Francis ANGHINOLFI
(CERN)
