Speaker
Dr
Javier Jalle
(Cobham Gaisler)
Description
***ABSTRACT***
The GR740 microprocessor device is a SPARC V8(E) based multi-core architecture that provides a significant performance increase compared to earlier generations of European space processors. The device is the result the European Space Agency's initiative to develop a European Next Generation Microprocessor (NGMP).
Engineering models have been manufactured in 2015 and tested during the first quarter of 2016. Space qualification of flight models is planned to start in the second half of 2016. GR740 is the highest performing European space-grade general purpose microprocessor and, due to the presence of four powerful floating-point units, it is suitable for executing DSP applications. This abstract provides an overview of the GR740 and a subset of the benchmarks used within the ESA activity's functional validation effort. A more in-depth description of the architecture and results of DSP benchmarks will be added to the final paper and presentation.
***BACKGROUND***
The LEON project was started by the European Space Agency in late 1997 to study and develop a high-performance processor to be used in European space projects. Following the development of the TSC695 (ERC32) and AT697 processor components in 0.5 and 0.18 μm technology respectively, ESA initiated the Next Generation Microprocessor (NGMP) activity targeting a European Deep Sub-Micron (DSM) technology in order to meet increasing requirements on performance and to ensure the supply of European space processors. Cobham Gaisler was selected to develop the NGMP system that is centred around the new LEON4FT processor.
Throughout 2014 and 2015, the architecture was designed and manufactured in the C65SPACE platform from STMicroelectronics.
***ARCHITECTURAL OVERVIEW***
The figure below shows an overview of the GR740 architecture. The four LEON4FT processors are connected to a shared bus which connects to a 2 MiB EDAC protected Level-2 cache before reaching external EDAC protected SDRAM. Each LEON4FT processor has a dedicated pipelined IEEE-754 floating-point unit. The design makes use of extensive clock gating and the processors can be put in a power-down mode to conserve power when some or all processor cores are unused. While the GR740 implementation of LEON4FT lacks support for dedicated multiply-and-accumulate instructions this is mitigated by the presence of the large number of processor registers, L1 cache memory and high operating frequency.
![enter image description here][1]
The main communication interfaces of the device include eight external SpaceWire ports connected to an on-chip SpaceWire router, two 10/100/1000 Mbit Ethernet ports, MIL-STD-1553B and 32-bit PCI.
The four parallel CPU / FPU cores, each running on dedicated separate instruction and data L1 caches (Harvard architecture), at 250 MHz clock frequency, can theoretically provide up to 1 Gflop/s in single or double precision. Together with the multiple Spacewire and Ethernet interfaces, this makes the GR740 suitable for DSP applications, provided that the application implementation succeeds in making an efficient parallelisation and streaming of data across the shared on-chip buses. This shall be demonstrated with the implementation of dedicated DSP benchmarks, as for example those suggested in [1].
The NGMP architecture has already been evaluated in an effort where the GAIA VPU application was adapted to take advantage of a multi-core system. The conclusion from this effort was that the GR740 is fast enough to run the GAIA VPU application [2].
***FUNCTIONAL VALIDATION AND DSP BENCHMARKS***
The functional validation of the GR740 device builds on existing tests used in the frame of the NGMP activities. The tests include both functional and performance benchmarks. Benchmarks that may be of particular interest to a DSP audience include:
- Run of the SPEC CPU2000 benchmarks
- Run of PARSEC 2.1 benchmarks
- Benchmarks developed by Barcelona Supercomputing Center in the frame of the ESA contract Multicore OS Benchmark will be employed to analyse the capabilities of the GR740 to execute parallel workloads.
- EEMBC benchmarks: CoreMark, CoreMark Pro, Autobench, FPMark and Multibench.
The results of the functional validation effort will be summarised in a public technical note. The note will contain benchmark results and will also compare the GR740 results with other existing space-grade microprocessors.
The presentation will describe the results from the functional validation. In addition to this, the functional validation will be extended with DSP benchmarks targeted at the audience at the ESA DSP Day.
***CONCLUSION***
The GR740 is a SPARC V8(E) based multi-core architecture that provides a significant performance increase compared to earlier generations of European space processors, with high-speed interfaces such as SpaceWire and Gigabit Ethernet on-chip. The platform has improved support for profiling and debugging, and software tools have been upgraded to this new architecture. Moreover, a rich set of software is immediately available due to backward compatibility with existing SPARC V8 software and LEON3 board support packages.
The GR740 constitutes the engineering model of the ESA NGMP, which is part of the ESA roadmap for standard microprocessor components. It is developed under ESA contract, and it will be commercialised under fair and equal conditions to all users in the ESA member states. The GR740 is also fully developed with manpower located in Europe, and it only relies on European IP sources. It will therefore not be affected by US export regulations.
The functional validation effort aims to validate functionality of the device and of the development board that will be made available to the space industry.
The GR740 is the highest performing European space-grade processor to date and results of DSP benchmarks will be presented to allow industry to assess the GR740's suitability for DSP applications.
News about the GR740 device can be found at the following link: http://www.gaisler.com/gr740
***REFERENCES***
[1] Next Generation Space Digital Signal Processor Software Benchmark , Issue 1.0, TEC-EDP/2008.18/RT, 01 December, 2008
[2] RTEMS SMP Executive Summary, Issue 1, Revision 2, RTEMSSMP-ES-001, March 2015,
http://microelectronics.esa.int/ngmp/RTEMS-SMP-ExecSummary-CGAislerASD-OAR.pdf
[1]: http://gaisler.com/tmp/index.png
Summary
The GR740 microprocessor device is a SPARC V8(E) based multi-core architecture that provides a significant performance increase compared to earlier generations of European space processors. The device is the result the European Space Agency's initiative to develop a European Next Generation Microprocessor (NGMP).
Engineering models have been manufactured in 2015 and tested during the first quarter of 2016. Space qualification of flight models is planned to start in the second half of 2016. GR740 is the highest performing European space-grade general purpose microprocessor and, due to the presence of four powerful floating-point units, it is suitable for executing DSP applications. This abstract provides an overview of the GR740 and a subset of the benchmarks used within the ESA activity's functional validation effort. A more in-depth description of the architecture and results of DSP benchmarks will be added to the final paper and presentation.
Primary authors
Mr
Jan Andersson
(Cobham Gaisler AB)
Dr
Javier Jalle
(Cobham Gaisler)
Mr
Luca Fossati
(European Space Agency)
Mr
Magnus Hjorth
(Cobham Gaisler)
Mr
Roland Weigand
(European Space Agency)
