17-19 March 2020
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
UPDATE 02 March 2020: please be informed that SEFUW has been postponed. More information will be posted here in due course.

VeriPy: A Python Framework for the analysis and mitigation of soft-errors effects in SRAM-based FPGAs

17 Mar 2020, 15:45
15m
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands
Fault Tolerance Methodologies and Tools Fault Tolerance Methodologies and Tools

Speaker

Dr Corrado De Sio (Politecnico di Torino)

Description

Nowadays, SRAM-based FPGAs are becoming a common choice for space applications due to their main features such as reconfigurability, low costs and high-performance. However, SRAM-based FPGAs are also sensitive to several effects caused by ionizing radiations which leads to misbehavior of these devices. Therefore, a pre-deployment analysis and tackle of the effects caused by radiation-induced faults on SRAM-based FPGAs used in space mission application is mandatory.
VeriPy is a Python framework interfaced with Vivado Design Suite by Xilinx. It provides the tools, the means and the know-how for the analysis and the study of synthetized and implemented netlists for Xilinx FPGAs, focusing mainly on SEUs and MBUs effects, reliability analysis, errors propagation and traversal of complex netlists.

Primary authors

Dr Corrado De Sio (Politecnico di Torino) Prof. Luca Sterpone (Politecnico di Torino)

Presentation Materials

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