17-19 March 2020
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
UPDATE 02 March 2020: please be informed that SEFUW has been postponed. More information will be posted here in due course.

SpaceFibre and SpaceWire IP cores for radiation tolerant FPGAs

17 Mar 2020, 11:15
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands
Industrial Experiences Industrial Experiences


Dr Chris McClements (STAR-Dundee) Steve Parkes (STAR-Dundee)


STAR-Dundee has extensive experience with demanding applications on radiation tolerant FPGA devices utilising SpaceWire and SpaceFibre. The SpaceFibre Interface Single-Lane and Multi-Lane IP cores have been implemented very efficiently in radiation-tolerant FPGAs utilising the high-speed SerDes integrated in capable devices including the Virtex 5QV, Microchip RTG4 and Xilinx Ultrascale devices.
To provide higher performance, multiple lanes can be used in parallel, for example a net data rate (excluding the 8B10B encoding overhead) of 10 Gbit/s can be achieved in an RTG4 FPGA using four lanes. Higher data rates will be supported in the next generation of FPGA devices, including the Microchip PolarFire, the Xilinx KU060 and the NanoXplore NG-Large FPGA. The Microchip RT-PolarFire designs and integration with the NG-Large SerDes is in progress.
The SpaceFibre network is able to provide the high-reliability, high-availability, high-performance network technology which is essential for on-board data-handling elements
The applications and integration with next generation devices will be described.

Primary authors

Dr Chris McClements (STAR-Dundee) Steve Parkes (STAR-Dundee) Alberto Gonzalez Villafranca (STAR-Dundee Ltd) Albert Ferrer (Star Dundee)

Presentation Materials

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