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Description
In this article, we report the design of new analog and digital IP in 22nm FDSOI and against radiation effects (DARE). The purpose is to enable a magnetic non-volatile random-access memory (MRAM) for space. A test vehicle has been taped out. It contains a range of analog IP for powering and clocking the test chip and to provide safe power up and down sequences. These blocks are integrated into a monolithic power management unit (PMU) macro instantiated at digital top level. The digital part is synthesized from RTL and mapped to an 8-track radiation hardened standard cell library with DICE flops and specially designed combinational cells for clock and reset tree. The chip communicates to the world using a new hardened IO cell library for 1.8V and 3.3V. A fuse box provided by the foundry is used to store trim and config data.
