14–16 Mar 2023
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
Presentations available

GRLIB VHDL IP Library (Frontgrade Gaisler)

15 Mar 2023, 15:50
30m
Erasmus High Bay (European Space Research and Technology Centre (ESTEC))

Erasmus High Bay

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands
Industrial Experiences Industrial Experiences

Speaker

Fabio Malatesta (Frontgrade Gaisler AB)

Description

GRLIB is a VHDL IP library, developed and maintained by Frontgrade Gaisler (previously Cobham Gaisler) that provides reusable VHDL IP cores for the development of system-on-chip designs. The library includes a variety of IP cores such as processors, memory controllers, bus infrastructure, and peripherals that can be used to build digital systems ranging from simple controllers to complex system-on-chip designs with fault tolerance features. GRLIB is designed to be flexible and easy to use and is widely used in the space industry.
The library is vendor independent, with built-in support for different EDA tools and target technologies, and includes template designs for popular development boards from major vendors. The availability of template designs and IP cores with extensive heritage reduces the time and effort required for design and verification, and it also helps to ensure that the systems are reliable and of high quality.
The presentation will give an overview of GRLIB and it will provide a description of the latest additions to the library: improved support for Lattice and NanoXplore FPGA target technologies, the RISC-V NOEL-V processor, a High-Speed-Serial-Link Controller supporting WizardLink and SpaceFibre, improvements to the GRSCRUB FPGA supervisor, a NAND Flash memory controller, and a DDR2/DDR3 memory controller with strong EDAC capabilities.

Primary authors

Fabio Malatesta (Frontgrade Gaisler AB) Jan Andersson (Gaisler) Mr Martin Ronnback (Cobham Gaisler)

Presentation materials