Speaker
Description
With increasing demands on the computing power of future missions, it is essential that available resources are used efficiently, which can be achieved through greater flexibility, i.e., total or partial in-orbit reconfiguration of FPGAs. This work proposes a generic solution to safely reconfigure FPGAs from different manufacturers and technologies (Flash, SRAM) in space, including a generic interface towards the S/C.
The R3FPGA system consists of a reconfigurable target FPGA that represents the actual application of the mission and a reconfiguration engine that is responsible for managing the reception storage and deployment of the configuration bitstreams, and controlling the proper state of the target FPGA. Special attention is given to the overall reliability and robustness against radiation induced SEEs as well as SEFIs during the critical reconfiguration process as well as interaction with the scrubbing process, essential for SRAM-based FPGAs. Additionally, a generic interface based on standardized TM/TC commands (PUS) is developed and implemented in the bootloader.
The reconfiguration engine is designed as a flexible solution that is capable of connecting multiple FPGA devices and is radiation hardened. The proposed GR-716B-based solution consists of several memory devices and offers scrubbing as well as reconfiguration via miscellaneous interfaces. The goal is to support full and partial reconfiguration of the Xilinx UltraScale (SRAM), NanoXplore NG-Medium (SRAM), and Microchip PolarFire (Flash). Nevertheless, this work is carried out with an eye on future needs, therefore, the developed reconfiguration and scrubbing engine can be in principle adapted to support other FPGAs such as NG-Ultra and with embedded processors and AI elements, like the XQR Versal.
The feasibility of the solution will be assessed by the implementation of multiple use cases in dedicated HW demonstrators. A scientific use case of an optical or hyperspectral instrument is selected for NanoXplore and Xilinx SRAM-based FPGAs. Specifically, for the Xilinx UltraScale (SRAM), a custom development board with the (XQR)KU060 FPGA is manufactured, that can be reconfigured via SelectMap interface and can also be used to perform fault injection into the FPGA and thus exercise FDIR aspects. For Microchip PolarFire (Flash), a radar use case is foreseen, in which a modern reflector Synthetic Aperture Radar (SAR) with wide swath width and scan on receive (SCORE) principle is implemented on an evaluation board hosting a MPF300 FPGA that supports JTAG interface for reconfiguration.
The results of this study will support the use of reconfiguration of FPGAs under space conditions. For this reason, a test platform that consists of a reconfiguration engine and a target FPGA is exposed to radiation (heavy ion and proton). The upcoming test platform includes the reconfiguration engine and a science use case demonstrator. The overall goal of the radiation campaign to undergo heavy ion and proton tests of the UltraScale FPGA with focus on reconfiguration.
The work is carried out under ESA contract No. 4000134941/21/NL/CRS.
