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SEFUW: SpacE FPGA Users Workshop, 5th Edition

14–16 Mar 2023
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
Presentations available

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Session

Reconfiguration

16 Mar 2023, 11:40
Erasmus High Bay (European Space Research and Technology Centre (ESTEC))

Erasmus High Bay

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands

Conveners

Reconfiguration

  • Lucana Santos Falcon (Moltek Consultants Ltd. for European Space Agency)
  • Guillaume Lavigne (CNES)

Presentation materials

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  1. 49. Strategies for reliable on-board reconfiguration of FPGAs (R3FPGA) (DSI / TU Braunschweig / Hensoldt Sensors)
    Ole Bischoff (DSI Aerospace Technologie GmbH)
    16/03/2023, 11:40
    Reconfiguration

    With increasing demands on the computing power of future missions, it is essential that available resources are used efficiently, which can be achieved through greater flexibility, i.e., total or partial in-orbit reconfiguration of FPGAs. This work proposes a generic solution to safely reconfigure FPGAs from different manufacturers and technologies (Flash, SRAM) in space, including a generic...

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  2. 41. Continuous Integration in Space: An Approach to Automated Qualification of In-Orbit Experiments (Fraunhofer IIS)
    Mr Moritz Schreiber (Fraunhofer IIS), Mrs Katja Vornberger (Fraunhofer IIS)
    16/03/2023, 12:05
    Reconfiguration

    With the Fraunhofer On-Board Processor (FOBP), we created a fully in-orbit reconfigurable FPGA experimentation platform in geostationary orbit which will launch in 2023 as part of the Heinrich Hertz satellite mission.
    It provides digital signal processing for satellite communication for up to 450 MHz bandwidth and is flexibly programmable from ground.
    Reconfiguring the two Virtex-5QV FPGAs...

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  3. 48. Using eFPGA for LEON2-FT instruction set extensions (Daiteq)
    Martin Danek (daiteq s.r.o.)
    16/03/2023, 12:30
    Reconfiguration

    The talk will present the use of eFPGA for supporting application-specific, user-defined instructions in LEON2-FT. The work extends the SIMD-Within-a-Register (SWAR) concept, developed by daiteq for LEON2-FT and NOEL-V, with the aim to improve performance for applications such as GNSS or image processing where more data values can be stored next to each other in one processor register and...

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