SEFUW: SpacE FPGA Users Workshop, 5th Edition

Session

Poster Session

15 Mar 2023, 11:10

Erasmus High Bay (European Space Research and Technology Centre (ESTEC))

40. Estimating the Error Rates of Xilinx Zynq-7000 APSoCs in Space Radiation Environments (University of Piraeus)

Dr Dimitrios Agiakatsikas (University of Piraeus)

15/03/2023, 11:10

Poster Session

Recently, we are witnessing an increasing use of COTS FPGA devices in satellite systems that extend the capabilities of traditional onboard computers and enable the development of emerging space applications. One such device is the AMD-Xilinx Zynq-7000 APSoC, which is a System on Chip (SoC) integrating a dual-core Arm A7 processing system (PS) and modern SRAM FPGA programmable logic (PL)....

52. FPGA- and Flash-based mass memory system: architectures, implementations, industry projects and future trends (DSI-AS / TU Braunschweig)

Dr Gang Zhou (DSI-AS)

15/03/2023, 11:10

Poster Session

The flash-based mass memory system are very commonly used in PDHU and OBC. We will present a flexible FPGA architecture, which implements the most timing-critical data acquisition, buffering, storage and downlink functions. The architecture has been implemented in a compact and high-performance PDHU, which was presented on DASIA 2019: "A Compact High-Performance Payload Data Handling Unit for...

6. Intel’s Solution for Fast and Efficient Inference

Ruth Abra

15/03/2023, 11:10

Poster Session

The power of AI is increasing with ongoing research and investment. Convolutional Neural Networks excel at object recognition, object detection and image segmentation; transformers lead the way in sequence analysis, including translation, chatbot and search engine tasks. Loosely based on the micro-level architecture of the brain, these networks can – like the brain – be trained for specific,...

16. Payload Control & Data Processing Unit for SmallSats (Technolution B.V.)

Dr Gerard Rauwerda (Technolution B.V.)

15/03/2023, 11:10

Poster Session

Technolution Advance and the Royal Netherlands Aerospace Centre (NLR) have started the development of a new payload Control & Data Processing Unit (CDPU) targeted towards smallsats. The CDPU will act as a hub for optical instruments that forms a logical bridge between the instruments and the satellite platform. It will offer standardized hardware interfaces for integrating optical instruments,...

21. Practical and economic considerations for improving the reliability of FPGA-based control systems for space applications using a hybrid design approach (VORAGO Technologies)

Keith Odland (VORAGO Technologies), Germán Cuello (Vorago Technologies)

15/03/2023, 11:10

Poster Session

Field Programmable Gate Arrays (FPGAs) are ideal single-chip solutions for many applications. Many of these applications find their way into space. By their very nature, they are re-configurable, enabling the designer to create a standard chassis that can be deployed for various missions.

Space-based applications pose a unique set of challenges not typically found in celestial...

4. Real Number Gradient Descent Decoding for Fault Tolerant Linear DSP Transforms

Alexandru Amaricai (University Politehnica Timisoara)

15/03/2023, 11:10

Poster Session

We propose a fault tolerant mechanism for linear DSP applications, that relies on: (i) parity based real number error correction codes to store redundant information efficiently, (2) gradient descent correction loops for error estimation, and (3) fine grained check-pointing and roll-back for consistent redundant information encoding. The error correction is performed by a novel gradient...