16–18 Jun 2025
Universidade Nova de Lisboa
Europe/Berlin timezone

A NOVEL SELF CALIBRATING ANALOG BROADBAND RF PREDISTORTION LINEARIZER FOR Q/V-BAND POWER AMPLIFIERS IN 130 NM SIGE BICMOS TECHNOLOGY

16 Jun 2025, 17:00
30m
Rectorship building (Universidade Nova de Lisboa)

Rectorship building

Universidade Nova de Lisboa

Lisbon
Space Applications Radio Frequency

Speaker

Mathias Scharpf (Institut für Robuste Leistungshalbleitersysteme Universität Stuttgart)

Description

A NOVEL SELF CALIBRATING ANALOG BROADBAND RF PREDISTORTION LINEARIZER FOR Q/V-BAND POWER AMPLIFIERS IN 130 NM SIGE BICMOS TECHNOLOGY

SCHARPF, Mathias (University of Stuttgart)

Abstract— This article presents a new self-calibrating architecture for an analog Q/V-Band radiofrequency broadband predistortion linearizer for satellite communication applications in 0.13-μm SiGe-BiCMOS technology. To achieve a higher linearity and a reduction of the intermodulation products above the 3db compression point of a power amplifier a novel linearizer architecture for the reduction of the intermodulation product 3rd order is presented. The reduction of the 3rd order intermodulation products is done by generating 3rd order intermodulation products in a parallel nonlinear path and superimposing them inversely on the useful signal in order to eliminate the 3rd order intermodulation products at the output of the power amplifier.
I. INTRODUCTION
The introduction of active array antennas for telecommunications payloads raises completely new questions for the space industry regarding the selection and use of active components and their technologies. In previous classic space applications, the space requirement and power loss of the small signal preamplifiers do not play a dominant role, as they occur in small numbers and are distributed over a larger area, so that the high-performance components essentially determine the space and power requirements of an amplifier train. However, these parameters are of great importance for active group antennas and mean that new technologies based on silicon will complement or even replace the current technology mix of various GaAs technologies. Very compact and powerful RF modules with very different functionalities can be integrated on a silicon chip in a very small space. Through the additional implementation of a digital interface, the module can also be self-calibrated. So-called “Built-In Self-Tests (BIST)” are already used today in various RFICs (Radio Frequency Integrated Circuits) for microwave applications, e.g. for radar applications in the automotive sector [1] [2] [3] [4] [5] [6] [7]. Built-in self-tests in the chips available on the market only evaluate the small-signal S-parameters or one-tone output power. For broadband, analog predistortion linearizers, this self-test in the circuit should be expanded to include the adjustment of the third-order nonlinear intermodulation products. The built-in self-test simplifies and speeds up the testing procedure at the end of the production of an amplifier train or RF module, as the detectors integrated in the chip, including digital control of the measurement process, can be used instead of expensive laboratory RF measuring devices. In addition, the HF module can be readjusted or recalibrated at any time - even in orbit. In this circuit, the frequency bands of the Q/V bands (37 – 66 GHz), which have so far not been widely used for satellite communication, are to be developed. The Q and V bands potentially play an increasingly important role in future applications in both broadband earth-to-satellite gateway connections and inter-satellite connections. With a focus on:
• Miniaturization and cost efficiency through the use of modern SiGe BiCMOS MMIC technology,
• increased functionality through automated self-calibration of transceivers,
• Scalability by addressing all relevant frequency bands of satellite communication in the millimeter wave range
II. SYSTEM ARCHITECTURE
Fig. 1. LRFIC system architecture
The system architecture of the wideband analog predistortion linearizer (LRFIC: Linearizer RFIC) can be seen in Fig.1. The circuit consists of a linear and non-linear path. The input power of the LRFIC is -20dBm and the output power is +2dBm. A gain of 22dB from input to output must be achieved in the LRFIC. For this purpose, the useful signal is raised to the required output level in two steps. The first gain is in the linear path by 10dB. The second gain after combining with the nonlinear path by approximately another 10dB.
A. Linear path
In the linear path, a true-time delay (TTL) is required for correct superimposition of modulated signals from linear and non-linear paths.
B. Nonlinear path
In the nonlinear path, the IM3 products are generated and superimposed on the linear path. In order to obtain only the IM3 products, the non-linear path is further divided. In the lower path, the signal is not linearly distorted in order to achieve high IM3 proportions. In the upper non-linear path, a very linear signal is intended without IM3. When the two paths are superimposed, the fundamental frequencies are canceled. What remains are the pure IM3 parts. These are then adjusted in phase and amplitude in order to achieve maximum cancellation of the IM3 generated in the downstream high-power amplifier (HPA) after being superimposed on the linear path. The use of phase and amplitude equalizers (EQ) is intended to achieve adjustable output behavior of the HPA over a bandwidth of 5GHz. In addition, this should enable variability for the application with traveling wave tube amplifiers (TWT) and solid-state power amplifiers (SSPA).
REFERENCES

[1] G. Rebeiz, „RFIC/Silicon-Based Phased Arrays and Transceivers for 5G,“ IEEE Microwave Magazine, pp. 96-103, May 2009.
[2] O. Inac, „A Phased Array RFIC With Built-In Self-Test Capabilities,“ IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, pp. 139-147, January 2012.
[3] O. Inac, „A Phased Array RFIC with Built-In Self-Test using an Integrated Vector Signal Analyzer,“ in IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), Waikoloa, HI, USA, 2011.
[4] O. Inac, „Built-in self test systems for silicon-based phased arrays,“ in 2012 IEEE/MTT-S International Microwave Symposium, Montreal, QC, Canada, 2012.
[5] S.-Y. Kim, „A 76–84-GHz 16-Element Phased-Array Receiver With a Chip-Level Built-In Self-Test System,“ IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, pp. 3083-3095, August 2013
[6] C.-C. Ma, „A 48–55 dB Full-Band Image Rejection RF Down-Converter IC with Automatic I/Q Self-Test Calibration for LEO Satellite Communications,“ in 22nd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Las Vegas, NV, USA, 2022.
[7] T. Shimura, „A 28-GHz Phased-array Receiver with an On-chip BIST Function by using a Shielded Symmetrical Signal Distributor,“ in 49th European Microwave Conference, Paris, France, 2019.

Primary author

Mathias Scharpf (Institut für Robuste Leistungshalbleitersysteme Universität Stuttgart)

Presentation materials