Speaker
Mr
Bruce Ferguson
(Microsemi)
Description
There are many applications for motion control in space. The application may require rotational torque or linear force in addressing such system functions such as antenna pointing, solar array positioning, robotic arms and control valves. A versatile design is needed to address as many applications as possible with a new integrated circuit so that the initial research and development investment can be recouped. IC developments are typically upwards of several hundred thousand US dollars. A versatile motor control design can be used for different types of synchronous motors such as stepper motors, brushless DC motors, and torque motors. A versatile position sensor will interface to resolvers, synchros, linear variable differential transformers (LVDT), potentiometers, optical sensors, and limit switches.
The first step in partitioning a versatile design approach is to look for the common elements in all the different applications. All motors require switches to regulate current to the motor coils, many applications require a pulse width modulated switch in a half bridge configuration. N channel MOSFETs are typically better performing than P channel but require a floating high side driver. All closed loop motor control algorithms require current sensing; variations include power line sensing, ground current sensing and motor terminal current sensing. For the most versatility, the current sensing should be floating and configurable. Position sensors such as resolvers or LVDTs consist of a transformer primary driven by an exciter reference. The transformer secondary must be sampled to extract the position information. In order for the motion control system to be versatile, a customized programming algorithm must be adapted to each case. A programmable controller can consist of a DSP that executes sequential instructions or it can be an FPGA with the ability to process multiple data pipelines simultaneously.
The motion control function can be broken down into three specific IC requirements. A high voltage IC process such as a 1.0um, 350V, trench isolated BCD process is needed for interfacing to the motor switches and current sensing; typical spacecraft systems are powered from voltage sources that range from 12V to 150V. A low voltage, 0.6um, BiCMOS IC (5V) process is needed for signal processing and could also be used for some moderately dense logic. Specialized proprietary design techniques and circuit models are required to make use of processes that might otherwise not be radiation tolerant. The signal processing portion requires a small geometry process such as 65nm that can implement hundreds of thousands of gates. The signal processing portion can utilize radiation tolerant devices such as FPGAs that are “off the shelf”. The high voltage and low voltage analog silicon chips can be co-packaged as a device that appears from the pins out to be a single IC even though it contains two chips. A technique of wire bonding between the chips has been demonstrated successfully in production. This two chip approach is still considered an IC by the Defense Logistics Agency. This co-packaging of chips exploits the advantages of each process. The use of a radiation tolerant FPGA alongside a versatile analog front end as its companion chip is the essence of our “System Manager” total system approach.
An example of a function that is partitioned between the three different ICs in this system is the floating current sense. The floating current sense uses the dynamic range of the high voltage IC to interface to the current sense resistor. There is an initial gain stage implemented in the high voltage process that feeds its output to an instrumentation amplifier implemented in the 5V process. The 5V IC shares the same signal ground with the FPGA. Once level shifted from floating high voltage to a signal ground referenced, the analog signal is sampled using a second order sigma delta modulator implemented in the BiCMOS process. The lower voltage process can implement functions in less space due to the smaller geometry. The output of the modulator is a “ones density” data stream that is voltage compatible with the FPGA. The data stream consumes just one package pin as it is routed between the analog front end (AFE) and the FPGA. In the FPGA a specialized IP block performs a sinc3 filter and decimation function. In the FPGA this can be done at a speed that could not be supported in the AFE 5V process. This pipeline from sense resistor to FPGA control loop takes full advantage of the unique capabilities of each of the ICs it passes through.
The digital signal processing of the motor control function can be partitioned into functional blocks to provide the greatest level of IP reuse. Functions can be added or removed to an application depending on what type of control algorithm is needed. Individual blocks can be customized by setting variables. An example of this is the setting of the decimation rate in the sinc3 filter IP block; signals with a higher oversample rate will have higher resolution at the cost tradeoff of longer latency. A CAD design tool such as Libero SoC allows blocks to be configured and customized.
Radiation tolerance for this design will be demonstrated by testing for total dose, ELDRs and Single event upset immunity. The same fabrication process and design techniques for the motion control system analog front end were used to develop the LX7730 64 channel telemetry manager ICs; this part was confirmed tolerant of a 100krad total dose and SEU up to a fluence of 1e8 part/cm2 and linear energy transfer of 87.85 MeV/mg.cm2.
Summary
This paper outlines the methodology used in the system design of a radiation tolerant motion control system and examines some of the design challenges encountered and how they were met.
Primary author
Mr
Bruce Ferguson
(Microsemi)
Peer reviewing
Paper
Paper files:
