AMICSA & DSP 2016

Session

Session 6: IP Cores, FPGAs, and their Synergies with DSPs

16 Jun 2016, 11:30

Gothenburg, Sweden

Conveners

Session 6: IP Cores, FPGAs, and their Synergies with DSPs

• Jan Andersson (Aeroflex Gaisler)

15. Multi-core DSP sub-system IP

Dr Gerard Rauwerda (Recore Systems)

16/06/2016, 11:30

DSP Day: DSP IP cores and related IP including NoC

**Architecture** The multi-core DSP sub-system comprises the following key building blocks: • The Xentium® is a programmable high-performance DSP processor core that is efficient and offers high-precision; • Network-on-Chip (NoC) technology provides sufficient bandwidth, flexibility and predictability which are required for interconnecting DSP cores and I/O interfaces in streaming...

47. DSP and FPGA: Competition, Synergy, and Future Integration in Space ASICs

Dr Roland Trautner (ESA/ESTEC)

16/06/2016, 12:00

DSP Day: Other topics

Digital Signal Processors (DSPs) have been popular devices for computation-intensive data processing for many decades. In comparison to General Purpose Processors (GPPs), their specific architectural designs support efficient processing of digital data via separate data and instruction memories, combined operations such as multiply-accumulate (MAC), hardware support for efficient loop...