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SEFUW: SpacE FPGA Users Workshop, 4th Edition

9–11 Apr 2018
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
PLEASE READ ME: public presentations (made available by the presenters) posted on website - for the presentations not available and/or password protected, a public version was not made available by the presenters.

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Session

FPGAs: High Performance

10 Apr 2018, 15:20
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands

Conveners

FPGAs: High Performance

  • Lucana Santos (ESA)

FPGAs: High Performance

  • Lucana Santos (ESA)

Presentation materials

There are no materials yet.

  1. 32. Review and comparison of design methodologies and hardware implementations on FPGA technologies. Case study: CCSDS compression algorithms for multispectral and hyperspectral images
    Dr Antonio Sánchez (IUMA/ULPGC), Mr Yúbal Barrios (IUMA/ULPGC)
    10/04/2018, 15:20
    Reprogrammable Field Programmable Gate Arrays (FPGAs) for space applications, are becoming steadily more common in space applications due to their high flexibility to change dynamically the functionality of the on-board system, combined with high performance and low power consumption. SRAM-based FPGAs) are vulnerable to radiation, which can cause bit flips in the configuration memory,...
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  2. 9. Image compression on reconfigurable FPGA for the SO/PHI space instrument
    Mr David Hernandez Exposito (Instituto de Astrofísica de Andalucía - CSIC)
    10/04/2018, 15:40
    In this work we present a novel FPGA implementation of the Image Data Compression standard proposed by the Consultative Committee for Space Data Systems (CCSDS-IDC 122.0-B) aboard the Polarimetric Helioseismic Imager instrument of the ESA’s Solar Orbiter mission (SO/PHI). The SO/PHI telemetry constraints enforce the use of specific strategies for on-board data reduction, analysis, and...
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  3. 4. Implementation of Visual Based Navigation in a CPU-FPGA architecture for planetary landing
    Mr Joao Oliveira (Spin.Works)
    10/04/2018, 16:00
    The work presented in this article is the product of an activity with the objective of further develop and flight test visual based navigation (VBN) and hazard detection and avoidance (HDA) algorithms to serve the needs of future Mars and other planetary missions and raise them to a technology readiness level (TRL) of 5 (“critical function verification in a relevant environment”). The...
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  4. 50. Implementation of a GNSS Space Receiver on a Zynq
    Mr Marc Majoral (CTTC)
    10/04/2018, 16:50
    Currently the Agency is using space-qualified GNSS receivers based on ASIC solutions (in particular, the AGGA-family) integrated in ad-hoc instruments (receivers). Such receivers provide outstanding measurement quality required for POD (Precise Orbit Determination) performed on ground, but at the cost of high price and power consumption. In order to address the needs of low cost missions (eg:...
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