Speaker
Prof.
Steve Parkes
(University of Dundee)
Description
STAR-Dundee with the University of Dundee has recently designed several high performance DSP units each using SpaceWire or SpaceFibre interfaces to provide an input/output performance in-line with the capabilities of the specific DSP processor.
The first DSP unit is for the High Processing Power Digital Signal Processor (HPPDSP) project, which is an ESA funded project led by AirbusDS with STAR-Dundee Ltd and CG Space. It aims to build a high performance, programmable DSP processor suitable for spaceflight applications. STAR-Dundee was responsible for the hardware, FPGA and low level software development. The HPPDSP is designed around the TI TMS320C6727B processor which is available as a space qualified part. The DSP processor connects to external SDRAM via its EMIF (external memory interface) bus. Peripherals that are directly controlled by the DSP processor are attached to the EMIF bus via an FPGA. Other peripherals that are able to access DSP memory and registers in parallel with the DSP processor are attached to the UHPI (Universal Host Processor Interface) bus of the DSP processor via the FPGA. A board has been designed incorporating the TMS320C6727 processor, SDRAM memory and a Xilinx Virtex 4 FPGA. The FPGA includes EDAC for the SDRAM memory, memory management, SpaceFibre and SpaceWire interfaces, and other general purpose interfaces. A high sample rate ADC/DAC interface is also included.
The second DSP project is a high performance FFT processor for a THz Radiometer. Implemented in various FPGA technologies this Wideband Spectrometer (WBS) is able to perform 2k point complex FFTs at a sample rate of around 2.4 Gsamples/s in radiation tolerant technology, a total processing power of more than 200 GOPS. Each FFT board processes a 2 GHz wide band to a resolution of around 3 MHz. SpaceWire is used to gather the data from several of these spectrum analysers to handle up to 12 GHz bandwidth.
The third DSP project is the Ramon Chips RC64 Many Core DSP processor, where STAR-Dundee provided the SpaceWire and SpaceFibre technology for this very powerful programmable DSP processor.
The paper will describe the HPPDSP architecture, the FPGA design and the board design. It will give an overview of the WBS system and present the latest implementation of this high performance DSP system. A brief summary of the RC64 processor will be provided. In each case the role of SpaceWire and SpaceFibre in the different systems will be described.
Summary
This paper describes the use of SpaceWire and SpaceFibre to provide input and output facilities for high performance DSP systems. Three examples are provided: the ESA funded High Processing Power DSP (HPPDSP) which uses a radiation tolerant DSP from TI, the Wideband Spectrometer which implements a high performance FFT in an FPGA, and the Ramon Chips RC64 Many Core programmable DSP.
Primary author
Prof.
Steve Parkes
(University of Dundee)
Co-authors
Mr
Albert Ferrer
(Star Dundee)
Dr
Alberto Gonzalez Villafranca
(STAR-Dundee Ltd)
Mr
Chris McClements
(STAR-Dundee)
