Conveners
Industrial Experiences
- David Dangla (CNES)
Industrial Experiences
- Agustin Fernandez-Leon (ESA)
Industrial Experiences
- David Merodio Codinachs (ESA)
Industrial Experiences
- Silvia Moranti (ESA)
Mr
Ottmar Ried
(Airbus Defence & Space GmbH)
09/04/2018, 10:30
Since years Airbus Defence and Space capitalizes on the advantages of Field Programmable Gate Array Technologies and has accumulated considerable heritage and experiences with it. This presentation provides with an overview of the application domains and the FPGA devices that address those application fields. That extends from the well-established Microsemi anti fuse FPGAs (RTSX/RTAX) to more...
Johannes Both
(Jena-Optronik)
09/04/2018, 10:50
Thanks to its robust design and accurate measurements, the Jena-Optronik RVS© LIDAR sensors are the most frequently used rendezvous- and docking sensors for ISS resupply by the European ATV, Japanese HTV and the US-American “Cygnus” transport vehicle built by Orbital ATK. The RVS sensor is limited, though, to rendezvous and docking with cooperative targets, i.e. targets equipped with...
Prof.
Steve Parkes
(University of Dundee)
09/04/2018, 11:10
STAR-Dundee has extensive experience with demanding applications on the Microsemi RTG4 FPGA. Single-lane and multi-lane SpaceFibre IP cores have been designed and tested on the RTG4 along with other SpaceFibre IP cores. This serial interface IP runs at 3.125 Gbits/s using the internal SerDes of the RTG4. An FFT-based spectrometer has been designed which performs a 1k-point complex FFT at 2.4...
Dr
Rajan Bedi
(Spacechips Ltd)
10/04/2018, 10:00
We compare and share design-in experiences of Xilinx's, 20 nm, Kintex UltraScale KU060 for space applications. This FPGA offers 726k LUTs and 32, 12.5 Gbps high-speed serial links, offering the potential to enable the next generation of real-time, high-throughput payloads. The KU060 can instantiate Xilinx's, TMR, MicroBlaze 32-bit RISC MPU for fault-tolerant applications as well as Vivado's IP...
Dr
Rajan Bedi
(Spacechips Ltd)
10/04/2018, 17:10
We compare IP implementation and share design-in experiences of six 65 nm ultra deep-submicron, space-grade and COTS FPGAs: RTG4, V5QV, NG-MEDIUM, NG-LARGE, IGLOO2 and SmartFusion2.
Two versions of the RTG4 flash FPGA containing the same rad-hard die are available to the space industry: a 1657 CCGA/CLGA device and a 352-pin CQFP part with less (166 vs. 720) I/O and fewer (4 vs. 24)...
Dr
Jorge Tonfat
(Space Research Institute / Austrian Academy of Sciences)
11/04/2018, 14:00
In this work, it is presented how both IPs were adapted and functionally verified for the PLAnetary Transits and Oscillations of stars (PLATO) RDCU. The PLATO mission goal is to detect terrestrial exoplanets around bright solar-type stars and characterize them to determine their habitability.
The PLATO instrument is based on a multi-telescope concept. The RDCU is part of the Instrument...
Mr
DANILO LAMONACA
(Thales Alenia Space Italy)
11/04/2018, 14:20
The electronic systems are becoming more and more complex and in need of new high performance programmable logic devices, with an increased number of internal resources and high speed interfaces.
In TAS-I the Xilinx Virtex5QV device is going to be used on a flight unit and this presentation aims to share with the FPGA space community our experience on two specific aspects : (1) A short...
Mr
Damien Rambaud
(IRAP CNRS)
11/04/2018, 14:40
I will present the use of FPGA in the different parts of the SVOM/Eclairs project : how they are used in the instrument itself and how we implement prototypes but also how we use them to allow scientists to do more accurate simulations of the instrument by using FPGA based instrument simulator.
Mr
Lei Jia
(Institute of Computer and Network Engineering (IDA), TU Braunschweig, Braunschweig, Germany)
11/04/2018, 15:00
A novel Next Generation Mass Memory Architecture (NGMMA) has been introduced for future space application within the scope of an ESA study (Contract No. AO/1-5975/08/NL/LVH) to cope with the growing demands on very high-speed and huge data volumes of future space-borne instruments. In this context, a new memory controller architecture has been developed and evaluated, which interfaces DDR3...
Mr
Felix Vermersch
(SERMA)
11/04/2018, 15:20
This talk presents a comparison of the performances between FPGAs XILINX Virtex 5QV and Microsemi RTG4 from a reference space design.
It presents the modifications brought to the reference design to adapt it to the new target : the Microsemi RTG4.
The problems met in this porterage owed to the differences of the technologies and a comparative degree of the performances on each of the targets...
Mr
Luis Berrojo
(Thales Alenia Space in Spain)
11/04/2018, 15:40
TAS has been involved on the Radiation Testing and End User Validation of the BRAVE FPGA within the frame of the H2020 VEGAS project. TASE is the leader of the radiation test campaign and device characterization. Positive preliminary results indicate that the device is a good candidate for Space applications, although additional campaigns are still foreseen. For End User Validation purposes...
