Conveners
Industrial Experiences
- David Merodio Codinachs (ESA)
- David Dangla (CNES)
Industrial Experiences
- There are no conveners in this block
Industrial Experiences
- Guillaume Lavigne (CNES)
- Lucana Santos Falcon (Moltek Consultants Ltd. for European Space Agency)
Industrial Experiences
- David Merodio Codinachs (ESA)
- David Dangla (CNES)
Industrial Experiences
- David Merodio Codinachs (ESA)
- David Dangla (CNES)
Industrial Experiences
- Filomena Decuzzi
- David Dangla (CNES)
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Jean-Luc Poupat (ADS)14/03/2023, 10:00Industrial Experiences
From first generation of antifuse FPGAs more than 20 years ago to last generation of Xilinx Versal, FPGA technologies have always been in the DNA of Airbus digital equipment. Beyond being just a "user" of these FPGA technologies, Airbus is also a major contributor of the NG-Ultra product development offering to Europe a key rad-hard FPGA with an embedded System-on-Chip.
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What can be noticed... -
Dr Chris McClements (STAR-Dundee), Marti Farras Casas14/03/2023, 10:25Industrial Experiences
SpaceWire (ECSS-E-ST-50-12C) is a data-handling network for use on-board spacecraft, which interconnects instruments, mass-memory, processors, downlink telemetry, and other on-board sub-systems. SpaceWire is simple to implement and has some specific characteristics that help it support data-handling applications in space. SpaceFibre (ECSS-E-ST-50-11C) is an evolution of SpaceWire, being...
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AURELIEN ODOUNDE (CNES), Florent Manni (CNES (DSO/TB/ET)), Guillaume Lavigne (CNES)14/03/2023, 11:30Industrial Experiences
**CNES status on Nanoxplore developments. The following activities will be described during this presentation:
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- On the IP side , DDR2 and Esistream projects will be described.
- The R5 reference design will be presented.
- R5 software environment (XNG and GNU )
- The presentation will finish with Comodo Large and Ultra boards.
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Adam Taylor (Adiuvo Engineering Training ltd)14/03/2023, 15:20Industrial Experiences
“Over 80% of FPGA released into the field have a nontrivial error” – Wilson Group Survey
All RTL developers are familiar with coding standards which outline the rules which the RTL should be developed in accordance with. Enforcing these rules is normally the performed by peer review, which makes the enforcement variable.
A better approach to enforcing code quality is use of a static...
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Patrice BENARD (3D PLUS)14/03/2023, 15:45Industrial Experiences
Nowadays, SRAM-based FPGAs present an increasing need for high-density configuration memories on one hand, and for space applications, configuration memories must be hardened against the effects of radiation on the other hand. Today, there is a lack of rad tolerant high density configuration memories in the market. Moreover, some high performance SRAM-based FPGAs used for space applications...
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Simone Vagaggini14/03/2023, 16:10Industrial Experiences
SpaceWire (SpW) is one of the most widely used communication standard in space applications for on-board data handling. Ensuring that a SpW device is bug-free and highly reliable is crucial to reduce to zero the risk of compromising the space mission.
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In this paper, a SystemVerilog Verification Intellectual Property (VIP) supporting the full testing of any implementation of a SpW Codec is... -
Matthew Rowlings (Thales Alenia Space UK)15/03/2023, 09:30Industrial Experiences
A modular design approach is a fundamental concept for developing high-complexity FPGA designs. Both design and verification effort can be reduced by partitioning system design requirements into functionally isolated modules, using standard interconnects between these modules to tie the system together. IP core reuse of proven modules and modules with flight heritage can reduce both mission...
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Christophe POURRIER (Sodern)15/03/2023, 09:55Industrial Experiences
This abstract focuses on the Sodern Navigation Cameras for Jupiter Icy moon Explorer (JUICE) and Mars Sample Return Earth Return Orbiter (MSR-ERO). The Cameras are custom made with TRL FPGA inside to withstand constraints of radiation environment and high observation capabilities. The first one is named NAVCAM for Navigation Camera, the camera is a key instrument for the spacecraft navigation,...
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Aloïs Wolff (Watt&Well)15/03/2023, 10:20Industrial Experiences
Permanent Magnet Synchronous Motor (PMSM) control is a field where real-time processing capabilities play a substantial role in the system’s performance. The usual tradeoff for the processing elements amounts to choosing between a DSP or an FPGA, with the latter seen as more complex to develop and maintain.
This tradeoff usually does not hold out against the specific constraints in the...
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Philippe MERCIER (Thales Alenia Space)15/03/2023, 10:45Industrial Experiences
We present an early evaluation of a flight-proven altimeter design implementation on NG-ULTRA FPGAs using a HLS-to-Bitstream design flow relying on Siemens-EDA Catapult (HLS) & Precision (synthesis) tools and NanoXmap design suite.
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Our analysis focuses on three main aspects :
1) Provide feedbacks on the design flow developed by Siemens-EDA
2) Compare the performances of Precision with those... -
Miguel Masmano (Fent Innovative Software Solutions S.L.)15/03/2023, 15:25Industrial Experiences
The EU-funded "qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem (HERMES)" project was launched in March 2021 to increase the rad-hard NG-ULTRA SoC TRL to 6 and to develop and validate a software ecosystem that will allow users to take full advantage of the capabilities of this platform.
FentISS collaborates in this project, jointly with...
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Fabio Malatesta (Frontgrade Gaisler AB)15/03/2023, 15:50Industrial Experiences
GRLIB is a VHDL IP library, developed and maintained by Frontgrade Gaisler (previously Cobham Gaisler) that provides reusable VHDL IP cores for the development of system-on-chip designs. The library includes a variety of IP cores such as processors, memory controllers, bus infrastructure, and peripherals that can be used to build digital systems ranging from simple controllers to complex...
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Damien Rambaud (IRAP CNRS), Mr Stéphan Maestre (IRAP CNRS), Mr Jérémy Guillermand (Alten)15/03/2023, 16:20Industrial Experiences
We present different use case of FPGA in science projects at IRAP ( Institut de recherche en astrophysique et planétologie ) :
- SVOM/Eclairs : a satellite for gamma-ray burst observation
- DORN : an instrument for the measurement of Radon on the moon
- Litebird : an international project to measure the cosmic microwave background
polarization
For each case, the scientific...
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jokin perret (EREMS)16/03/2023, 16:05Industrial Experiences
ARIETIS is a standalone 3 axes electronic gyroscope which is currently under development by INNALABS (Ireland) and EREMS (France).
One of EREMS responsibility on this product is the development of the FPGA design, based on NanoXplore European technology, the NX1H35AS (NG-Medium).The ambitious measurement precision of this gyroscope is at the root of several technical challenges for the...
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Raphael Mena Morales (Airbus Defence and Space Limited)16/03/2023, 16:30Industrial Experiences
Future telecommunications satellites are envisioned to seamlessly integrate into the mobile communication networks of the next generation. First signs toward the integration are already visible today with the ongoing normative activities on non-terrestrial networks in the current 5G New Radio standard. A general goal in these next generation communication networks is to employ radio terminals...
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