TEC-ED & TEC-SW Final Presentation Days - May 2017

8 May 2017, 09:00 → 9 May 2017, 17:10 Europe/Amsterdam

Newton 2 (ESA/ESTEC)

Kjeld Hjortnaes (ESA/ESTEC - Software Systems Division), Philippe Armbruster (ESA/Data Systems Division)

The Software Systems Division (TEC-SW) and Data Systems Division (TEC-ED) Final Presentation Days are scheduled on Monday 8 May & Tuesday 9 May in conference room Newton 2 (ESA/ESTEC, The Netherlands)

All material presented at the workshop must, before submission, be cleared of any restrictions preventing it from being published on this web-site.

Presentations (zip file) Presentations_Monday_08_May.zip Presentations_Tuesday_09_May.zip

Monday 8 May

09:30 → 10:30 Registration + Coffee

10:30 → 10:40 Welcome & Introduction

10:40 → 11:20 SHyLoC: CCSDS Lossless Compression IP-Cores for Space Applications

Speaker: Ms Lucana Santos (IUMA)

Abstract 10.40_CCSDS_Lossless_Image.pdf

Presentations 01a_-_CCSDS_-_TO_Intro.pdf 01b_-_CCSDS_-_Presentation.pdf

11:20 → 12:00 INSPECTOR – A supporting tool for AIT/AIV phase

Speaker: Mr Lukasz Kwiecinski (ITTI Ltd)

Abstract 11.20_Inspector.pdf

Presentations 02a_-_INSPECTOR_-_TO_Intro.pdf 02b_-_INSPECTOR_-_Presentation.pdf

12:00 → 12:40 RTEMS Symmetric Multiprocessing Optimization and Improvement for LEON multi-core

Speakers: Mr Matthias Goebel (Embedded Brains), Mr Sebastian Huber (Embedded Brains)

Abstract 12.00_RTEMS_Symmetric.pdf

Presentation 03a+b_-_RTEMS_-_TO_Intro_+_Presentation.pdf

12:40 → 14:00 Lunch Break

14:00 → 14:40 Multicore Emulation on Virtualised Environment

Speaker: Mr Ruediger Gad (Terma GmbH)

Abstract 14.00_Multicore_Emulation.pdf

Presentation 04b_-_Multicore_-_Presentation.pdf

14:40 → 15:20 Prototype SpaceWire RMAP Boot Software for Secondary Processor

Speakers: Mr Alberto Ferazzi (Terma GmbH), Dr Mattias Holm (Terma GmbH)

Abstract 14.40_Prototype_SpaceWire.pdf

Presentation 05b_-_SpaceWire_RMAP_-_Presentation.pdf

15:20 → 16:00 SpaceWire Node Interface IP Core

Speaker: Mr Antonis Tavoularis (Teletel)

Abstract 15.20_SpaceWire_Node.pdf

Presentation 06a_-_SpaceWire_Node_-_TO_Intro.pdf 06b_-_SpaceWire_Node_-_Presentation.pdf

16:00 → 16:30 Coffee Break

16:30 → 17:10 SPI Protocol Implementation for Space

Speakers: Mr Antonio Tramutola (TAS-I), Mr Antonis Tavoularis (Teletel)

Abstract 16.30_SPI_Protocol.pdf

Presentation 07a+b_-_SPI_Protocol_-_TO_Intro_+_Presentation.pdf

17:10 → 17:50 Cosmic Vision Technology Test Vehicle Design and Evaluation Activities

Speaker: Mr Daniel Gonzalez (Arquimea)

Abstract 17.10_Cosmic_Vision.pdf

Presentations 08a_-_Cosmic_Vision_-_TO_Intro.pdf 08b_-_Cosmic_Vision_-_Presentation.pdf

Tuesday 9 May

08:30 → 09:00 Registration

09:00 → 09:40 Ethernet PHY Characterisation

Speaker: Dr Cristina Plettner (Airbus DS)

Abstract 09.00_Ethernet.pdf

Presentations 01a_-_Ethernet_-_TO_Intro.pdf 01b_-_Ethernet_-_Presentation.pdf

09:40 → 10:20 FT-UNSHADES maintenance

Speaker: Dr Hipólito Guzmán Miranda (Univ. of Sevilla)

Abstract 09.40_FT_Unshades.pdf

Presentations 02a_-_FT-UNSHADES_-_TO_Intro.pdf 02b_-_FT-UNSHADES_-_Presentation.pdf

10:20 → 11:00 SETA tool update: SETs in Flash-based FPGAs

Speaker: Prof. Luca Sterpone (PdiTorino)

Abstract 10.20_SETA_Tool.pdf

Presentations 03a_-_SETA_-_TO_Intro.pdf 03b_-_SETA_-_Presentation.pdf

11:00 → 11:30 Coffee Break

11:30 → 12:10 KIPSAT 2: Deep Sub-Micron C65SPACE

Speaker: Mr Thierry Scholastique (STMicroelectronics)

Abstract 11.30_KIPSAT.pdf

Presentations 04a_-_KIPSAT_&_HPDP_-_TO_Intro.pdf 05b_-_KIPSAT_-_Presentation.pdf

12:10 → 12:50 High Performance Data Processor (HPDP): Architecture and Back-end Flow

Speaker: Mr Constantin Papadas (ISD)

Abstract 12.10_HPDP.pdf

Presentation 04b_-_HPDP.pdf

12:50 → 14:00 Lunch Break

14:00 → 14:40 Assessment of the Implementation of the EFL Time-Randomised Cache in the NGMP Architecture

Speakers: Mr Carles Hernandez (BSC), Mr Francisco Cazorla (BSC)

Abstract 14.00_Assessment_of_the_Implementation.pdf

Presentation 06a+b_-_NGMP_-_TO_Intro_+_Presentation.pdf

14:40 → 15:20 Modular RTU

Speaker: Mr Javier Goyanes (CRISA)

Abstract 14.40_Modular_RTU.pdf

Presentations 07a_-_RTU_-_TO_Intro.pdf 07b_-_RTU_-_Presentation.pdf

15:20 → 15:50 Coffee Break

15:50 → 16:30 AUTOCOGEQ - Preparation for the Qualification of Auto-Code Generated from Simulink Models

Speaker: Mr Francesco Pace (GMV)

Abstract 15.50_AUTOCOGEQ.pdf

Presentations 08a_-_AUTOCOGEQ_-_TO_Intro.pdf 08b_-_AUTOCOGEQ_-_Presentation.pdf

16:30 → 17:10 GRSRIO - Serial RapidIO Logical Layer IP Core Flexible DMA Engine for Serial RapidIO Endpoints

Speaker: Mr Stefano Di Mascio (Cobham Gaisler)

Abstract 16.30_GRSRIO.pdf

Presentations 09a_-_GRSRIO_-_TO_Intro.pdf 09b_-_GRSRIO_-_Presentation.pdf