EDHPC 2025 - 2nd European Data Handling & Data Processing Conference

12 Oct 2025, 18:00 → 17 Oct 2025, 17:00 Europe/Amsterdam

EDHPC 2025

The second European Data Handling & Data Processing Conference – EDHPC 2025 – will be held from the 13th to the 17th of October 2025 in Elche, Spain. It is organised by the European Space Agency (ESA), with the support of the local tourist office. Find the latest information on the official website.

The presentations submitted will be uploaded (protected access) to the presentation materials on 9th of October, please make sure you have uploaded your updated presentation, after this date please update the presentation directly in the presentation materials.

All of the presentations will be made available after the conference after receiving permission from the authors.

EDHPC IEEE LaTeX template

EDHPC2025 Conference Copyright Form.docx

IEEE EDHPC Word Template.docx

Sunday 12 October

18:00 Pre-opening cocktail

Monday 13 October

EDHPC Plenary: Welcome and Keynotes

1 Conference Welcome

Speakers: Kostas Marinis (ESA), Ali Zadeh (ESA)

EDHPC 2025-Opening-KM-FInal.pptx

Keynote Speaker intro slides+bio notes.pptx

2 Keynote: Josep Rosello (ESA) "The evolution of the European Earth Observation Ecosystem and related Technology needs"

Biography
Josep Roselló is heading the Earth Observation (EO) Technology coordination section in the EO Future Missions and Architecture Department at ESA ESTEC. He’s a Telecommunications Engineer from UPC in Barcelona (ES) and also holds an MBA from RMS in Rotterdam (NL). He joined ESA in the Data Handling Division in D/TEC in 1992, and he moved to the D/EOP Directorate in 2007. He’s been involved in the development of a large number of technologies in the area of avionics, communication, navigation and EO remote sensing, as well as in many ESA projects and programmes like Envisat, MetOp-SG, Copernicus, and also in Newspace-related ones.

Speaker: Josep Rosello (ESA/ESTEC/EOP-SFT)

00-Invited-speech-ESA-JRosello.pdf

00-Invited-speech-ESA-JRosello.pptx

3 Keynote: Miguel Cordero (ESA): Celeste: paving the way towards Positioning, Navigation and Timing in Low Earth Orbit (LEO-PNT)

Biography
Miguel Cordero joined the European Space Agency as Radionavigation Engineer in 2015. He has been providing support to the navigation programmes (EGNOS and Galileo) as well as to other missions making use of space GNSS receivers. Since 2020 he has been supporting the activities related to LEO-PNT carried out by the Agency including Celeste IOD mission. Before joining ESA he worked in the development of navigation modules for UAV autopilots.

Abstract
Positioning, Navigation, and Timing (PNT) services enabled by Global Navigation Satellite Systems are foundational to the functioning of modern society. Despite the significant impact of PNT in economy and society, GNSS systems face well-documented limitations. Low Earth Orbit (LEO) satellites have emerged as a promising solution to address these challenges. ESA’s LEO-PNT initiative, the Celeste In-Orbit Demonstrator (IOD) aims at validating enabling technologies such as frequency-diverse signal generation and transmission, on-board orbit determination and time synchronization, and advanced small satellite platforms, to demonstrate the feasibility and benefits of augmenting existing GNSS with a LEO-based layer. Beyond the Celeste IOD, ESA is working with the European Union towards defining a potential EU LEO-PNT operational system in complement to EGNOS and Galileo. The next phase, the Celeste In-Orbit Preparatory (IOP) phase under ESA’s FutureNAV programme, will encompass technology development, industrialisation and in-orbit validation. This phase will be instrumental in shaping future operational LEO-PNT initiatives institutional or commercial.

Speaker: Miguel Cordero (ESA)

10:40 Coffee Break

EDHPC Plenary: Keyontes Afternoon

4 Keynote: Tmo Dirkes (DSI): Payload Data Handling – Bridging Mission Demands and Technology Capabilities

Biography
Timo Dirkes became part of DSI in 2018, serving as a System Engineer focused on spaceborne mass memory and data handling equipment for commercial and ESA projects. His role expanded in 2021 when he took over the position of Head of Engineering, overseeing the technical implementation of various flight program developments. DSI Aerospace GmbH develops innovative hardware and software solutions and computer technologies for space applications. Our hardware and software are flying as part of prominent space programs such as ExoMars (Mars mission) and JUICE (Jupiter mission). Since 1997, our steadily-growing international team has been producing high- performance, customer-specific and dependable solutions.

Abstract:
Space missions are generating exponentially larger volumes of data, driven by increasingly advanced payloads and more ambitious scientific or commercial goals. Meeting these demands, requires high-performance data handling systems including mass memory systems with high capacities, fast data throughput and high reliability. Simultaneously, advancements in onboard data processing and the adoption of powerful COTS Processors and FPGAs are shifting the paradigm from simple storage to intelligent data handling, enabling compression, interpretation or even onboard analytics. The gap between mission requirements and available technology remains significant, highlighting trade-offs in performance, power, and reliability. Bridging this gap and establishing the relevant roadmaps will define the capabilities of future missions.

Speaker: Timo Dirkes (DSI)

5 Keynote 4: Sergio Ramirez Navidad: Insights into the Proba-3 Mission

Biography:
Sergio is an aerospace engineer with a master’s degree in Aerospace Engineering, with specialty in Space Vehicles, by the Technical University of Madrid. He has almost 10 years of experience in the area of navigation data fusion and sensors, systems engineering and project management. He works at Sener Aerospace and Defense as a Product Line Leader for Navigation Systems, which include the development and production of navigation systems for space transportation (like the NAVIGA unit for the VEGA-C and VEGA-E) and autonomous flight termination systems for launchers.

Abstract:
The audience will discover how the Proba-3 mission pioneers solar coronagraphy and formation flying, with two spacecraft working in precise coordination. They’ll learn about the technical innovations, operational challenges, and commissioning process that have made this mission unique. Finally, the keynote will share lessons learned and future applications, highlighting Proba-3’s impact on space technology.

Speaker: Sergio Ramirez Navidad (SENER Aeroespacial)

12:30 Lunch

EDHPC Tutorial: ADHA 101

Conveners: David Steenari (ESA), Kostas Marinis (ESA)

6 ADHA 101: ADHA introduction and overview

Speaker: David Steenari (ESA)

EDHPC2025 - ADHA 101 Tutorial - 01-ADHA Introduction.pdf

EDHPC2025 - ADHA 101 Tutorial - 01-ADHA Introduction.pptx

7 ADHA 101: ADHA Architecture

Speakers: Julian Bozler (Airbus Space Systems), Robin Franz (Airbus Defence and Space)

EDHPC2025 - ADHA 101 Tutorial - 02-ADHA Architecture.pdf

EDHPC2025 - ADHA 101 Tutorial - 02-ADHA Architecture.pptx

8 ADHA 101: ADHA Module Designs

Speaker: Mr Dario Pascucci (Thales Alenia Space)

EDHPC2025 - ADHA 101 Tutorial - 03-ADHA Modules.pdf

EDHPC2025 - ADHA 101 Tutorial - 03-ADHA Modules.pptx

9 ADHA 101: Navigating the ADHA datapack, and how to participate in the ADHA eco-system

Speaker: David Steenari (ESA)

EDHPC2025 - ADHA 101 Tutorial - 04-ADHA Datapack.pdf

EDHPC2025 - ADHA 101 Tutorial - 04-ADHA Datapack.pptx

10 The need for advanced thermal cooling for Electronic Units

Speaker: Stephane Lapensee (ESA)

EDHPC_2025_Thermal_Rev2.pdf

EDHPC_2025_Thermal_Rev2.pptx

EDHPC Tutorial: BrainChip part 1

Conveners: Alf Kuchenbuch (Brainchip), Gilles Bezard (Brainchip)

EDHPC Tutorial: Mathworks: AI-based Spacecraft Pose Estimation on ANY FPGA - part I

Conveners: Lucas Garcia (Mathworks), Stephan van Beek (MathWorks)

11 MathWorks Tutorial Part I: AI-based Spacecraft Pose Estimation on ANY FPGA

Speakers: Mr Lucas Garcia (MathWorks), Stephan van Beek (MathWorks)

AI-based Spacecraft Pose Estimation on ANY FPGA

EDHPC Tutorial: Radiation Testing

Conveners: Dr Maris Tali (ESA), Melanie Berg (Space R2 LLC), Pierre Maillard (AMD, INc.)

12 Radiation Effects in FPGAs and SoCs: Adapting to a Changing Technological Landscape

Abstract
FPGAs and SoCs are well-suited for complex designs and evolving algorithms in terrestrial and space applications, especially compared to ASICs. This tutorial covers SRAM and non-volatile FPGA architectures, their evolution into modern Adaptive SoCs, and mechanisms behind Single Event Effects (SEE) and Total Ionizing Dose (TID). We’ll also explore how Functional Safety, RAS, and AI/ML applications have impacted SEE metrics, mitigation, and testing. It includes error classifications, mitigation strategies, testing methods, and results. The final section addresses challenges and solutions for next-gen markets, including telecom, automotive, data centers, avionics, and defense sectors.

Biography
Dr. Pierre Maillard leads the Radiation Effects & RAS Solutions team at AMD’s Adaptive Embedded Computing Group (AECG), focusing on the architecture, development, and validation of radiation-tolerant FPGA and SoCs solutions for markets such as Telecom, Avionics, Automotive, Datacenters, AI, Defense and Space. He has more than 20 issued patents in radiation effects on electronics and is a Senior Member of IEEE, with over 20 publications and presentations in industry-leading conferences and journals. Dr. Maillard holds M.S. and Ph.D. degrees in Electrical Engineering from Vanderbilt University and an M.S. from the University of Montpellier II.

Speaker: Pierre Maillard (AMD, INc.)

13 Radiation Hardness Assurance for Complex Devices: The Untold Story

Abstract
For space systems, particle ionization can cause faults in microelectronics that inhibit operation and hence reduce reliability. In turn, radiation hardness assurance methods have been developed to perform system failure analyses. These practices have been applied for decades and are now in need of being modernized for better characterization of today’s complex system applications. This presentation describes what is required to test and analyze complex components such as SoC and FPGA devices, how conventional methods are insufficient, and how new methods can provide optimal coverage for failure analyses.

Biography
Mrs. Melanie Berg has over 35-years of experience as a designer, verification engineer, instructor, and reviewer for ASIC and FPGA applications. Her more visible accomplishments are her contributions to the FPGA designs for the NASA sponsored New Horizons Pluto and Beyond Mission; and her research/development in mitigation strategies. Melanie is a member of the Radiation Effects and Analysis group at NASA/GSFC; and is the founder/CEO of Space R3 LLC. She has published and presented several papers regarding: ionization and microelectronic error-response characterization, reliable synchronous design methodology, robust verification techniques, mitigation strategies for critical circuitry, reliability/survivability prediction calculations, and hardness assurance for space flight systems.

Speaker: Melanie Berg (Space R2 LLC)

14 Radiation Testing Tutorial Roundtable

Speakers: Dr Maris Tali (ESA), Melanie Berg (Space R2 LLC), Pierre Maillard (AMD, INc.)

16:00 Coffee Break

EDHPC Tutorial: Brainchip part 2

Conveners: Alf Kuchenbuch (Brainchip), Gilles Bezard (Brainchip)

EDHPC Tutorial: HW accelerators, and ESA Harmonization Process

Conveners: Lucana Santos Falcon (European Space Agency), Apolline Queno (Akkodis), Kostas Marinis (ESA)

15 Hardware Accelerators

Speaker: Lucana Santos Falcon (European Space Agency)

2025-EDHPC-HW-Accelerators_camera_ready.pdf

16 ESA Harmonisation Process, and overview of TDE/GSTP programs

This presentation will outline the ESA Technology Harmonisation process, including its objectives, scope, and benefits for space entities, as well as the timeline for the 2026 Harmonisation Cycles. There will be a particular emphasis on the Onboard Computers, Data Handling, and Microelectronics (OBDHM) dossier, which is scheduled for revision during the 2026 cycle 2.
It will also provide insight into how Harmonisation outcomes contribute to the ESA GSTP and TDE programs.
Industry and member state representatives are encouraged to attend to learn about upcoming technology development opportunities and the procedures for applying to these tenders.

Speakers: Apolline Queno (ESA TEC-RH), Kostas Marinis (ESA)

EDHPC Tutorial: Mathworks: AI-based Spacecraft Pose Estimation on ANY FPGA - part II

Convener: Adam Taylor (Adiuvo Engineering Training ltd)

17 Adiuvo Engineering Tutorial Part II: AI-based Spacecraft Pose Estimation on ANY FPGA

Speakers: Mr Adam Taylor (Adiuvo Engineering), Stephan van Beek (MathWorks)

AI-based Spacecraft Pose Estimation on ANY FPGA

EDHPC Tutorial: Satellite Radio Frequency payloads and Instruments

Conveners: Dr Adem Coskun (ESTEC), Max Ghiglione (ESA)

18 Satellite Radio Frequency payloads and Instruments

Speakers: Dr Adem Coskun (ESTEC), Max Ghiglione (ESA)

Radio Frequency Payloads Tutorial EDHPC 2025.pptx

18:00 Opening cocktail

Tuesday 14 October

ADHA Plenary

Conveners: David Steenari (ESA), Kostas Marinis (ESA)

19 ADHA (Advanced Data Handing Architecture) - Development Status and Roadmap

Speakers: David Steenari (ESA), Kostas Marinis (ESA)

EDHPC2025-ADHA_SessionA1-01-ADHA-Roadmap-final.pdf

EDHPC2025-ADHA_SessionA1-01-ADHA-Roadmap-final.pptx

20 ADHA and the Needs for the Earth Observation Ecosystem

Speaker: Josep Rosello (ESA/ESTEC/EOP-SFT)

00-ADHA-ESA-JRosello.pdf

00-ADHA-ESA-JRosello.pptx

21 ADHA-3: the expansion of a modular standard

Speaker: Julian Bozler (Airbus Space Systems)

EDHPC2025_SessionA1_03_ADHA_ADS.pptx

22 ADHA System Study Expansion: Missions use cases analysis, additional modules and ADHA-3U specifications, Data/SW Interfaces and EGSE standardization

Speaker: Mr Dario Pascucci (Thales Alenia Space)

EDHPC2025_ADHA_SessionA1-04-ADHA-3 Expansion TAS.pptx

23 ADHA-3 Expansion: unlocking the full potential

Speaker: Jon Caudepon (OHB)

EDHPC2025_ADHA_SessionA1-05-ADHA-3 Expansion unlocking the full potential_FINAL.pdf

EDHPC2025_ADHA_SessionA1-05-ADHA-3 Expansion unlocking the full potential_FINAL.pptx

24 Roundtable on ADHA

Speakers: Mr Dario Pascucci (Thales Alenia Space), Jon Caudepon, Josep Rosello (ESA/ESTEC/EOP-SFT), Julian Bozler (Airbus Space Systems), Kostas Marinis (ESA)

On-board Processing Architectures

Conveners: Gianluca Furano (ESA/Data Systems Division), Dr Maris Tali (ESA), Oskar Flordal (Unibap AB)

25 Reshaping the Earth-Observation value chain through AI-eXpress powered satellite-as-a-service

Speaker: Dr Vito Fortunato (Planetek Italia)

P20S1218-159-v1_Presentation_PaperID45_AIX_at_EDHPC2025.pdf

26 Satellite-as-a-Service Architecture for ML Edge Computing on Heterogeneous Processing Platforms

This paper presents a Satellite-as-a-Service (SaaS) architecture designed to enable flexible and efficient deployment of Machine Learning (ML) workloads on heterogeneous edge hardware platforms in space. Leveraging container-based virtualization (Docker) and an orchestration framework (Kubernetes), our approach abstracts hardware complexity and supports a variety of accelerators — FPGAs, TPUs, VPUs and NPUs — within a unified development and deployment environment. We integrate DevOps design principles delivering a reconfigurable stack that supports rapid ML model updates and deployment on target hardware. By treating satellites as extensible service platforms, we demonstrate how containerization and hardware abstraction streamline the onboarding of advanced ML algorithms, ranging from convolutional neural networks for image processing to neuromorphic paradigms for ultra-low-power inference. We detail how standardized APIs and modular workflows promote interoperability across multiple satellite systems and heterogeneous hardware accelerators.

Speaker: Evgenios Tsigkanos (OHB Hellas)

OHBH_EDHPC_2025_SaaS_presentation.pptx

27 Modeling Latency and Energy Trade-offs in Emerging Space Edge Computing Architectures

Speaker: Dorian Chenet (Thales Alenia Space, Université de Rennes 1)

edhpc2025_dorian_chenet.pdf

28 Intelligent Platform Study outcomes: End2end architecture to unlock System Autonomy

The Intelligent System Initiative is a crosscutting initiative that aims to advance the autonomy of space-based systems in a disruptive way. The Initiative adopts a global system-of-system approach, exploiting synergies with application domains from a multitude of sectors.

Speaker: Chiara Brighenti (S.A.T.E. S.r.l.)

EDHPC2025_Intelligent Platform System Study Outcomes.pdf

Buses & Networks - SpaceWire & SpaceFibre: #1

Conveners: Dr Bruce Yu (ESA), Pietro Nannipieri (University of Pisa)

29 Introduction

Speakers: Dr Felix Siegle (ESA-ESTEC), Dr Bruce Yu (ESA)

EDHPC - Buses & Networks Introduction.pptx

30 A Generic SpaceWire Transport Layer

The transport layer is the essential part in the open system interconnection (OSI) reference model, since it is the interface between the software-oriented layers 5-7 and hardware-oriented layers 1-3. On the one hand, it provides a general approach for data exchange with the software-oriented layers, independent of the underlying hardware. On the other hand, it is responsible for an efficient and reliable use of the underlying hardware. These characteristics make the transport layer crucial for the effective usage of a communication system, as it significantly reduces the implementation effort for the software-oriented layers.

The lack of a transport layer is a huge disadvantage. Combining the functionality of different communication layers into single application specific protocols can lead to the coexistence of multiple, non compatible approaches, resulting in a higher implementation effort for integrating new applications. Therefore, the existence of a transport layer is fundamental for both communication software and hardware, to provide established communication concepts, which are a precondition for the use of standardized software libraries, and to integrate modern computing trends (e.g. Big Data, Data-Mining, machine learning, cyber security).

SpaceWire does not yet define a general transport layer. This paper presents the approach of a minimalist SpaceWire transport layer, as common base for the implementation of higher level protocols. It comprises both the hardware related SpaceWire transport node and the associated software counterpart as well as the associated protocol. The transport layer implementation is one result of our longstanding SpaceWire development and is already in use in several robotic systems.

agswtl.pdf

31 Neolink: A Scalable, Redundant, and QoS-Aware SpaceWire Communication System for On-board Spacecraft Data Handling

2025_-_EDHPC_-_Neolink_presentation.pdf

32 Towards a low-effort SpaceFibre evaluation

Speaker: Rafael Plonka

Towards a low-effort SpaceFibre evaluation.pptx

33 Ultra-Fast, Low-Overhead SpaceFibre Communication for System-on-Chips

2025_edhpc_dave_gibson_final_v1.pptx

Exhibition

10:20 Coffee Break

ADHA (Architectures & Equipment)

Conveners: Mr Vilhelm Geijer (Beyond Gravity), Eleonora Mariotti (ESA)

34 Modular and Scalable Electrical Architectures for Satellite Payloads using ADHA (Advanced Data Handling Architecture)

Speaker: David Steenari (ESA)

EDHPC2025-SessionA2-01-ADHA-Architectures-final.pdf

EDHPC2025-SessionA2-01-ADHA-Architectures-final.pptx

35 Avionics Unit Modularity Convergence across Spacecraft Classes using ADHA

Speaker: Remi Roques (Airbus)

EDHPC 2025 - 48 - Presentation - ADHA and convergence across classes V5.pptx

36 Development and Reliability assesment of High Data Rate cPCI Serial Space Connectors

Speaker: Mr Joaquin Jimenez Carreira

EDHPC2025 ESA HDR connectors ADHA_Joaquin Jimenez_Leo Farhat 14 10 2025.pptx

37 ADHA On-board Computer Module (AOBCM)

Speaker: Mr Paolo Giovanni Ciparelli (TAS)

ADHA On-board Computer Module (OBCM)_EDHPC2025.pdf

EDHPC 2025 - ADHA On-board Computer Module (AOBCM).pdf

38 A3M - An ADHA-based scalable Solid-State Mass Memory

Speaker: Christian Spindeldreier (DSI Aerospace GmbH)

EDHPC-2025_A3M_Presentation_v2.pdf

EDHPC-2025_A3M_Presentation_v2.pptx

Payload Processing Architecture

Conveners: Mr Orion AZZIS (THALES ALENIA SPACE), Richard Jansen (ESA)

39 A Camera Payload and Processing Unit for Autonomous Satellite Deployment Verification accelerated by Soft GPU

Engineering Minds Munich GmbH has developed a Camera Payload and Processing Unit (CPPU) for in-orbit monitoring and verification of satellite deployables. Reliable confirmation of solar panel or antenna deployment remains challenging for small satellites due to limited telemetry bandwidth and constrained power budgets.

The CPPU provides a compact and dependable solution by integrating camera interfacing, image buffering, and actuator control into a single unit. Cameras can be placed up to 1 m from the processing board, enabling flexible positioning for optimal visibility of critical mechanisms. Built on FPGA and bare-metal software, the platform emphasizes deterministic operation, testability, and robustness in the space environment. A flight model has already been delivered and validated, demonstrating the maturity of the development.

Current developments extend the CPPU with autonomous deployable-shape extraction, using a soft-GPU accelerated pipeline. The approach reduces image data from 8 Mbit to 1.6 kbit (a three orders-of-magnitude reduction) while retaining key geometric information in vectorized format.

EMM_EDHPC_10_2025_v2.pdf

40 From Zynq UltraScale+ to Versal AI Core based High Performance Processing solutions

Speaker: Alexandre MEGE (Airbus Defence and Space)

IEEE EDHPC HPC VERSAL presentation_v1.pdf

41 Towards Integration of COTS Systems for High Performance Computing Applications in High-Reliability Space Systems

Towards integration of cots systems.pptx

42 A reliable supervisor system utilizing an FD-SOI FPGA and MRAM for COTS-based payload data processing

Speaker: Clemens Horch (Fraunhofer EMI)

EDHPC 2025 Horch Presentation v3.pdf

43 Memory Synchronization in Multi-Processing Systems for Thermal Optimization in Satellite Payloads

PLU-EMM-PRE-0120_1d0_EDHPC25-Presentation.pdf

Buses & Networks - SpaceWire & SpaceFibre: #2

Conveners: Dr Bruce Yu (ESA), Pietro Nannipieri (University of Pisa)

44 100+ Gbps SpaceFibre on Space-Qualified FPGAs

100 Gbps SpaceFibre on Space-Qualified FPGAs v2.pptx

45 Effective, Robust TCP/IP over SpaceFibre

SpaceFibre links can operate without software intervention, are not constrained by a maximum packet length and provide a reliable link that transparently mitigates single-event effects produced by radiation events.

This work shows how SpaceFibre can be used by COTS devices with Ethernet interfaces and how it can leverage the standard TCP/IP stack to deliver even more capabilities.

Effective Robust TCPIP over SpaceFibre v3.pptx

46 SpaceFibre Radiation Testing on Versal

EDHPC_SpFi_Rad_Testing_Versal_2025_v3.pptx

Exhibition

Buses & Networks - Ethernet (TSN/TTE) & CAN-Bus: #1

Conveners: Dr Felix Siegle (ESA-ESTEC), Elisa Ballatore (SII)

47 High-Throughput Electrical Switching System on a Space-Grade Adaptive Computing Platform

EDHPC-2025_HyRES-DEM_Presentation.pptx

48 Advancing time-sensitive networks in aerospace: deterministic avionics aboard the MIURA-5

Speaker: Dr Jorge Sanchez-Garrido (Safran Electronics & Defense Spain)

Advancing_TSN_Aerospace_Miura-5_Deterministic_Avionics_submission_Sept_10th.pptx

12:30 Lunch

ADHA (Equipment) #1

Conveners: Mr Dario Pascucci (Thales Alenia Space), David Steenari (ESA)

49 New Instrument Controller Electronics (NICE) ADHA Next Generation ICU

Speaker: Dr Enrique García Núñez (Airbus Crisa)

Presentacion_NICE.pdf

50 High-Performance Reconfigurable Processing in Space: Utilizing the AMD Versal AI Core in an ADHA Co-Processing Module

This paper presents the development of a High-Performance Reconfigurable Processing Module (HIPER-PRO) for the Advanced Data Handling Architecture (ADHA) based on the AMD Versal AI Core FPGA. Within an ADHA Co-Processing Module (CPM), the Versal AI Core device provides unprecedented computing capabilities for future space missions including dedicated hardware accelerators for AI/ML on-board processing task.

Speaker: Julian Schneider (OHB System AG)

HIPER-PRO_EDHPC_2025.pptx

51 ADHA Co-Processor For On Board Artificial Intelligence

Speaker: Mr David Gonzalez-Arjona (GMV Aerospace & Defence SAU)

GMV_DGARJONA_ADHACOPROAI_EDHPC25.pdf

GMV_DGARJONA_ADHACOPROAI_EDHPC25.pptx

52 ADHA-compliant Next Generation RIUs

Speaker: Mr Jesus Ortiz Martín (Airbus Crisa)

ADHA-compliant Next Generation RIUs (presentation).pdf

ADHA-compliant Next Generation RIUs (presentation).pptx

53 SPACE!Box: On-Board Data Router for Future NTN and OBDH

Speaker: Ertan Göklü (DSI Aerospace GmbH)

EDHPC_SpaceBox_Presentation.pdf

DPUs & Instrument Electronics

Conveners: Mr Alberto Urbón Aguado (ESA - ESTEC - TEC-EDM), Mr Sybren de Jong (NLR)

54 Development Status of the 2nd-generation On-board Processing Unit Using COTS GPU

EDHPC2025_presentation_MELCO_Tachibana_revD.pdf

EDHPC2025_presentation_MELCO_Tachibana_revD_note.pptx

55 Serval Nano DPU – towards a mission-agnostic data processing unit

EDHPC_Serval.pptx

56 Context Imager: A Smart CubeSat Camera to Enable Intelligent Tasking of Onboard Instruments

Speaker: Charlotte Crawshaw (Craft Prospect)

EDHPC 2025 Slides - Context Imager.pdf

Buses & Networks - Ethernet (TSN/TTE) & CAN-Bus: #2

Conveners: Dr Felix Siegle (ESA-ESTEC), Elisa Ballatore (SII)

57 Time-Sensitive Networking for Space Systems: Enabling Deterministic Ethernet in Next-Generation Spaceflight

EDHPC_TSN_Final.pdf

58 Revolutionizing the Space Industry: The Power of TSN and RTOS Integration

Speaker: David Modroño Maeztu (System-on-Chip Engineering (SOC-E))

EDHPC_2025_The_Power_of_TSN_and_RTOS_Integration_251013.pdf

59 Data Distribution Service (DDS) over Time Sensitive Networking (TSN) for launchers

Speaker: Carlos Domínguez (GMV)

DDS-TSN-EDHPC_v1.0_presentation.pdf

60 Time Sensitive Networking for Space Applications: Definition and Demonstration

Speaker: Kamil Grzymkowski (ITTI)

EDHPC2025-59-Presentation-v2-20251011.pdf

EDHPC2025-59-Presentation-v2-20251011.pptx

61 TSN development platform for aerospace: a versatile TSN tool for the streamlined configuration of aerospace missions in combination with RTEMS

Speaker: Dr Jorge Sanchez-Garrido (Safran Electronics & Defense Spain)

TSN_DevKit_EDHPC_2025_slides_Submission_Oct_9th.pptx

Exhibition

15:40 Coffee Break

ADHA (Equipment) #2

Conveners: Julian Bozler (Airbus Space Systems), Enrico Melone (TEC-EDD)

62 ADHA Hyper Compute Units (AHCU): Case-Study for Integration of COTS SoC Devices in ADHA form factor for scalable on-board data centre units

Speaker: Ivan Rodriguez-Ferrandez (Coros Space)

AHCU_v3.pptx

63 Orion: Plug into to the future

Speakers: Prem Kumar Hari Krishnan (Evoleo Technologies GmbH), Mr Rodolfo Martins (Evoleo Technologies GmbH)

EDHPC_ORION.pptx

64 LION DPU – ADHA 3U-based architecture for data handling module for safety operation

Speaker: Mr Grzegorz Gajoch (KP Labs)

LION presentation.pdf

Payload Control & Processing Units

Conveners: Jon Caudepon (OHB), Dr Maris Tali (ESA)

65 FPGA Based CCD Data Handling in Optical Space Missions Euclid PLATO SMILE and Solar C

Speaker: Samuel Smit (Mullard Space Science Laboratory)

FPGA-Based CCD Data Handling in Optical Space Missions_ Sampie Smit V1.pptx

66 CRIMSON - Close Proximity Operations Control Unit Development and Qualification

Speaker: Mr Bruce Yu (ESTEC/European Space Agency)

EDHCP_2025 Close Proximity Operations Control Unit Development and Qualification - presentation.pptx

67 Optical Network Controller Leveraging Heterogeneous Processing Systems

Speaker: Mr Shohei Yamashita (NEC Space Technologies, Ltd.)

109_Yamashita_EDHPC_2025 (002).pptx

68 Hardware-Software Codesigned Calibration For Use Onboard HYPSO Satellites

Speaker: Samuel Boyle (Norwegian University of Science and Technology)

HWSW Codesigned calibration EDHPC2025.odp

Buses & Networks - Ethernet (TSN/TTE) & CAN-Bus: #3

Conveners: Dr Felix Siegle (ESA-ESTEC), Elisa Ballatore (SII)

69 Increasing Dependability of Spacecraft Avionics Using Time-Triggered Ethernet

Time-Triggered Ethernet enhances spacecraft avionics dependability by providing deterministic real-time communication and robust fault tolerance. Its mechanisms, including Virtual Self Checking Pair (VSCP) and Switch-Sourced-Sync (S3), improve error detection, isolation, and recovery, significantly reducing unmitigated error rates. Automated network verification tools further ensure configuration correctness and system reliability.

Speaker: Mario Gartner (TTTech Computertechnik AG)

EDHPC-2025_DependableSpacecraftAvionicsTTE-presentation-v2.pdf

70 Modular Fault-Tolerant Avionics for Space Exploration

EDHPC_Masar.pptx

71 Design and Development of a Redundant Ethernet Switch for Small Satellites

Speaker: Konstantin Schäfer

EDHPC 2025 - Presentation - Schaefer.pdf

RedundantSwitch-Presentation.pptx

72 Improving CAN-bus in space by true CANopen

Speaker: Mr Felix Körner (OHB System AG)

EDHPC-CAN-bus_in_space_true_CANopen.pptx

EDHPC-CAN-bus_in_space_true_CANopen_Final_Version.pptx

Exhibition

20:00 Surprise Social Event

Wednesday 15 October

ADHA (Building Blocks & Future)

Conveners: David Gonzalez-Arjona (GMV Aerospace and Defence), Kostas Marinis (ESA)

73 An Overview of the Foreseen MBSE Approach for ADHA Units and Modules: Methodologies and Applications

Speaker: Jon Caudepon

MBSE4ADHA.pptx

74 High-Performance, Multi-Lane, SpaceFibre Routing Switch for ADHA

The Advanced Data Handling Architecture (ADHA) concept has been developed in collaboration between European industry (integrators, and hardware suppliers) and the European Space Agency (ESA). ADHA defines a set of specifications for electronic data-handing units [1]. which is based on standardised, interchangeable, and interoperable electronics modules. SpaceFibre [2] provides the high data-rate interconnect for ADHA, both inside an ADHA unit, interconnecting the AHDA modules, and externally. This paper describes a SpaceFibre routing switch for AHDA hardware modules which is able to support the demanding data rates and interconnect architecture of ADHA applications.

Speaker: Dr Steve Parkes (STAR-Dundee)

EDHPC 2025 Presentation SpaceFibre Router for ADHA v4.pptx

75 EDHPC2025 ADHA sessions wrap-up

Speaker: David Steenari (ESA)

EDHPC2025-ADHA_SessionA5-01-ADHA-Wrap-up v2.pptx

Advanced On-Board Processing I

Conveners: Enrico Melone (TEC-EDD), Leonidas Kosmidis (Barcelona Supercomputing Center)

76 Real-Time Onboard Data Accumulation and Pre-Processing for the Photospheric Magnetic field Imager on ESA’s Vigil mission

ESA’s Vigil mission is an operational mission planned to monitor the solar drivers of space weather conditions from the Lagrange point L5. The Photospheric Magnetic field Imager (PMI) on this mission shall provide full-disk vector magnetograms of the solar photosphere at a cadence of 30 minutes with 20-minute latency for its priority-1 data products. In addition, raw filtergrams and high-cadence line-of-sight magnetograms and Dopplergrams at a cadence up to 1 minute will be provided as supplementary data products. To meet the real-time processing requirements imposed by the telemetry volume, onboard pipelines are implemented in the processing unit hardware to produce low latency data products. In order to handle this computationally heavy task while meeting the latency requirement of the mission, the pipelines are implemented on a Field Programmable Gate Array (FPGA). This paper describes the series of steps involved in the first part of onboard data processing – from image acquisition and accumulation to polarimetric demodulation. It also discusses the parallel processing of the three pipelines in a resource-constrained FPGA in order to obtain a real-time processing environment which complies with PMI’s stringent requirements on accuracy, stability and reliability with the limited resources available on a deep space mission.

Speaker: Deepa Muraleedharan (Max Planck Institute for Solar System Research, Technische Universität Braunschweig)

EDHPC_DM_upload.pdf

EDHPC_DM_upload_PPT.pdf

77 Optimizing Methane Detection Onboard Satellites: Speed, Accuracy, and Low-Power Solutions for Resource-Constrained Hardware

Speaker: Jonáš Herec (Zaitra)

Methane_Herec_final.pdf

78 Towards real-time edge EO foundational models: CORSA on Hailo AI accelerator

Speaker: Nick Witvrouwen (VITO)

IEEE EDHPC 2025 - Towards real-time edge EO foundational models CORSA on Hailo AI accelerator - presentation.pdf

79 On board Data Processing Orchestrator

Speaker: Mrs Adele Karam Hankache (Thales Alenia Space)

EDHPC_OnBoardOrchestrator.pptx

Buses & Networks - Downlink Protocols

Conveners: Dr Felix Siegle (ESA-ESTEC), Dr Christian Spindeldreier (DSI Aerospace GmbH)

80 Optimal file size distribution in CFDP

This presentation explores how upcoming space missions like CO2M are addressing challenges in space-to-ground data transmission, especially under unreliable link conditions. It focuses on the use of File Based Operations and the CFDP protocol to improve data handling and reliability. Key differences between CFDP Class 1 and Class 2 are discussed, showing how file size and transaction limits impact data availability. An optimization approach is presented to balance file size, memory constraints, and link performance for robust mission operations.

Speaker: Patrick Bihn

EDHPC-2025_OHB_Optimal-File-Size_CFDP(1).pptx

81 Delay Tolerant Network (DTN) – Study and Development of Bundle Protocol (BP) and Licklider Transmission Protocol (LTP)

ballatore_presentation_Delay_Tolerant_Network_Study_Development_of_BP_and_LTP_october_3.pdf

82 FILE BASED OPERATIONS (FBO) FOR COPERNICUS MISSIONS CFDP FILE TRANSFER PROTOCOL IMPLEMENTATION WITHIN THE MILA COMMON PLATFORM - A MULTI-SITE & TRANSNATIONAL CO-ENGINEERING & TEAM WORKING

Speaker: Mr Orion AZZIS (THALES ALENIA SPACE)

EDHPC 2025 Presentation - MILA Avionics implementation of the CFDP File Transfer Protocol - Update 15 min - final.pdf

83 AN FPGA ACCELERATOR FOR CCSDS 142 O3K-LDPC FOR NON-COHERENT OPTICAL COMMUNICATIONS CODING AND SYNCHRONIZATION

Speaker: Dimitris Theodoropoulos (National and Kapodistrian University of Athens (NKUA))

EDHPC25-dscal.pdf

EDHPC25-dscal.pptx

Exhibition

10:20 Coffee Break

DHS Architectures

Conveners: Mr Antoine Di Via (ESA), Mr Michal Gumiela (KP Labs)

84 Novel On-board Computer and Data Handling Subsystem for European ADCS for Earth Observation Application

Speaker: Bojan Kotnik (SkyLabs d.o.o.)

EDHPC2025_PPT_E-ADCS_Bojan_Kotnik_v4.pptx

85 Two Approaches to Space Data Handling: ALTIUS and EIS IOD ESA Missions – Classical vs. Hybrid Architectures with Supervision.

DT_EDHPC_2025_paper_FINAL.pdf

DT_EDHPC_2025_presentation_FINAL.pdf

86 On-board Data Handling Security Reference Architecture

Speaker: Carlos Domínguez (GMV)

MSARA-GMV-EDHCP_2025_ppt_v2.0.pdf

87 Development of Scalable Mission Computers and Data Recorders

Speaker: Yuna Tsuji (Mitsubishi Electric Corporation)

Abstract Development of Scalable Mission Computers and Data Recorders(Abstract)_MELCO.pdf (Protected)

Presentation (upload)20251009_EDHPC2025-Development_of_Scalable_Mission_Computers_and_Data_Recorders.pdf (Protected) (upload)20251009_EDHPC2025-Development_of_Scalable_Mission_Computers_and_Data_Recorders.pptx (Protected)

Advanced On-Board Processing II

Conveners: Alberto Valverde Carretero (ESA), Enrique García Núñez (Airbus Crisa)

Advanced On-Board Processing II.pptx

88 CCSDS 123 Compression Applied to Interferograms: Demonstration of a High-performance On-board Data Compression Pipeline for the CAIRT Earth Explorer 11 Candidate

Speaker: Korbinian Moser (OHB System AG)

CAIRT_datacompression_presentation_final.pdf

CAIRT_datacompression_presentation_final.pptx

89 A Structured Approach to AFR-1 Satellite Data Processing & Utilization Using SCULPT

EDHPC_PPT_V2.pptx

90 Unibap Loom a real-time hyperspectral preprocessing pipeline for in orbit processing

Speaker: Oskar Flordal (Unibap AB)

EDHPC 2025 Unibap Loom A real-time hyperspectral preprocessing pipeline for in orbit processing presentation 251013.pptx

91 Bridging Reliability and High Performance in AI Execution with Radiation-Hardened Co-Processing

25 EDHCP AI Blueprint Final.pptx

AI for FDIR & Autonomous Operation

Conveners: Eleonora Mariotti (ESA), Dr Vito Fortunato (Planetek Italia)

92 Hera AI FDIR - On Board Telemetry anomaly detection using ML

Abstract— Autonomous fault and anomaly detection is critical for ensuring the safety and success of space missions, addressing the limitations of ground-based analysis due to bandwidth constraints and operational delays. The conventional approach in Space Operations involves using Out-of-Limits (OOL) alarms for anomaly detection, which may prove insufficient in identifying and responding to complex anomalies or unforeseen novelties within the range of nominal values [1], [2]. In our previous work [3], we proposed a Machine Learning (ML) approach for on-board telemetry anomaly detection that addresses these limitations. We demonstrated a proof-of-concept integration of a TensorFlow model onto a radiation-tolerant LEON 3 processor and benchmarked various unsupervised and semi-supervised techniques with respect to their performance, memory footprint, and runtime. Our recent advancements focus on bridging the gap between a proof-of-concept solution and a nearly production-ready system. Mainly, we focused on preparing a semi-automatic pipeline for model training and deployment, experimented with other types of machine learning models, and created a patch for TensorFlow Lite for Microcontrollers (TFLM) which allows integration to the LEON 3 processor while still following the guidelines regarding software safety. Additionally, we incorporated uncertainty quantification (UQ) techniques to provide a more reliable assessment of the black-box model’s outputs.

Index Terms— anomaly detection, novelty detection, machine learning, LEON processor, TensorFlow, TFLM.

Speaker: Lukáš Málek (Huld)

hera_ai_fdir_paper.pdf

hera_ai_fdir_presentation_v3.pdf

93 Advanced Health Monitoring and Failure Identification in Satellite Avionics using Machine Learning

Advanced Health Monitoring and Failure Identification in Satellite Avionics Using Machine Learning EDHPC final.pdf

94 Enhanced Reliability and Autonomy for Satellite Operations Through AI-Driven Predictive Maintenance of Control Moment Gyroscopes

251009_EDHPC25_Conference_Presentation.pdf

251009_EDHPC25_Conference_Presentation.pptx

95 Deploying AI-based Spacecraft Telemetry Anomaly Detection on an Adaptive System-on-Chip Solution

Speaker: Andrew Mccormick (Alpha Data Parallel Systems Ltd.)

EDHPC Alpha Data Slides-final .pdf

Exhibition

12:30 Lunch

Poster Sessions

96 A Modular Building Block for Advanced Space Robotic Servo Control

Speakers: Mr Gabriele Mantovani (Leonardo Space), Ms Francesca Cusimano (Leonardo Space)

EDHPC2025 - Poster - v1.pdf

97 Advanced Onboard Data Processing for the Photospheric Magnetic Field Imager in ESA’s VIGIL Mission

98 An Avionics Ecosystem for Small- and Mid-Size Satellites Based on 3U-ADHA Units and Modules

Speaker: David Steenari (ESA)

99 Analysis and Implementation of DVB-S2 in the UHF Band for STRATHcube Downlink Communications

Speaker: Daniel Stebbings (University of Strathclyde)

Poster_edhpc.pdf

100 ASIL2ECSS: Reusing Automotive Certification and Qualification Standards to Lower the Cost of Space Certification and Qualification for COTS Processors/SoC

ASIL2ECSS_EDHPC_2025.pdf

101 Design decisions of the deep-space Data Handling Subsystem Basic Software within the Advanced Data and Power Management System (ADPMS)

Speaker: Conor Begley

EDHPC Poster - Final.pdf

102 Design of machine learning payloads for technology and operations development through the lens of two space missions

103 Enhancing Flight Software Development through a Model-Based Approach: A Case Study on Alsat-1B

Developing satellite flight software (FSW) presents considerable challenges, requiring rigorous methodologies to ensure both reliability and efficiency. In this paper, we explore the application of Model-Based Development (MBD) to the periodic operations within the Attitude and Orbit Control System (AOCS) of the Alsat‑1B satellite. Our approach systematically models, simulates, and validates these functions using Unified Modeling Language (UML), Foundational UML (fUML), and Action Language for fUML (ALF). A pivotal aspect of our methodology is the use of ALF as an intermediary layer between the high-level model and the final code generation, ensuring that behavioral specifications are accurately translated into executable code. We evaluate the system’s robustness by simulating various error scenarios, including timing irregularities and state inconsistencies. The results demonstrate that our method facilitates early detection of design issues and supports a more reliable transition from model to code. This work highlights the potential of MBD to streamline FSW development for small satellites, offering valuable insights into enhanced testing and validation practices

Speaker: Dr Youcef Bouziane (Satellites Development Center, Algerian space agency)

104 Evaluation of new NIRCA Mk-II ASIC in real camera configuration

OHB_poster_NIRCA_EDHPC2025_i1.pdf

105 Explaining raw data complexity to improve satellite onboard processing

Speaker: Adrien DORISE (CNES)

poster_EDHPC_Adrien_DORISE_v2.pdf

106 Fast-SEnSeI: Lightweight Sensor-Independent Cloud Masking for On-board Multispectral Sensors

Fast_SEnSeI__Lightweight_Sensor_Independent_Cloud_Masking_for_On_board_Multispectral_Sensors_poster_final.pdf

107 From Shelf to Space: A Practical Evaluation of Radiation Hardness of COTS NVMe SSDs

Speaker: Mathieu Erbas

108 Instrument Control Unit (ICU) for Multi-Purpose Payloads: A Versatile and Modular Solution

The increasing demand for commercial payloads has driven the development of innovative, high-performance control and data acquisition systems. In this context, the Instrument Control Unit (ICU) emerges as a key component for the efficient control and management of Electro-Optical payloads. Our research presents an advanced ICU architecture that leverages the computational power of the SAMRH71 processor alongside the real-time capabilities of the RTG4 FPGA. This synergy enables the management and processing of large volumes of high-speed data, a critical factor for modern high-resolution observation technologies.
The ICU is designed for both high-performance data acquisition and exceptional modularity and flexibility. Its architecture facilitates integration into a wide variety of space payloads, allowing adaptation to different mission requirements. Key functionalities include TMTC (Telemetry and Telecommand) SpaceWire Interface and High-Speed Serial Link (HSSL) with Platform, Time Synchronization, Power Conditioning and Distribution and Thermal Control, and the management of up to two cameras via SpaceWire and Universal Asynchronous Receiver-Transmitter (UART) interfaces. Furthermore, the system can optionally incorporate a data compression module to reduce downlink bandwidth requirements when handling large datasets from multispectral, hyperspectral, and radar sensors. The unit is also engineered to drive stepper motor mechanisms for critical operations such as refocusing and shutter control, thus enhancing image quality.
A robust power management strategy is implemented by conditioning power from an unregulated primary bus and distributing it effectively across various subsystems, ensuring stable and reliable operation under unpredictable conditions. The ICU supports comprehensive in-flight reprogramming of both firmware and application software, including updates to the FPGA firmware and subsystem firmware. This dynamic reprogrammability enables the unit to adapt to evolving mission requirements and significantly extends the payload’s operational lifespan.
The core hardware components — the SAMRH71 Rad-Hard Microprocessor and the RTG4 radiation tolerant FPGA —complement each other in meeting the demanding requirements of spaceborne data acquisition. The SAMRH71 delivers high computational performance with low power consumption through its internal operating system (FreeRTOS), while the RTG4 provides real-time processing, and high data transfer performance (up to 5 Gbps) via its built-in serdes blocks. Moreover, thanks to the redundant interfaces toward platform and the high quality of components (at least ESCC Class 2 or equivalent), the ICU enhances the robustness of the Payload and its reliability figure.
The ICU has been designed to meet the requirement of three different E.O. Payloads in development at Leonardo Space Business Unit: Very High Resolution (VHR), Thermal Infrared (TIR) and Hyperspectral (HYP). The VHR payload, optimized for high-resolution Earth observation, features a refocusing mechanism to enhance image quality for applications ranging from environmental analysis to precision agriculture. The TIR payload requires high thermal control performance, measurement accuracy and stability. Finally, the ICU is tailored for hyperspectral imaging, providing high data management capability from two cameras. These applications underscore the ICU’s versatility and its ability to serve multiple missions in Earth observation.

Speaker: Alessio Fanfani (Leonardo)

109 New type of EGSE for ADHA modules / units

110 OBPMark and OBPMark-ML - Computational Benchmarks for On-Board Data Processing and Machine Learning in Space Applications

Speaker: David Steenari (ESA)

EDHPC2025 - Poster - OBPMark and OBPMark-ML - final.pdf

EDHPC2025_OBPMark.pdf

111 PrAICC: A Predictible Inter-Core Communication Model for AMP systems

Speaker: Sébastien Levieux (Université de Bretagne Occidentale)

EDHPC_2025_Poster.pdf

112 Rad-Hard Telemetry and Telecommand Mixed-Signal IC Suitable for RIU, RTU, and ICU Satellite Subsystems

Speaker: Dr Ernesto Pun-García (ARQUIMEA Research Center)

EDHPC2025_AQTMC01_poster.pptx

EDHPC2025_AQTMC01_poster_v02.pptx

113 The Space Power Standard: Architecture, Behavior and Connectivity

The Space Power System standard is an emerging standard for space power systems being developed by NASA and industry in both the USA and the UK [1]. This paper first introduces the Space Power System standard explaining the rationale behind the standard. It then outlines the architecture of the Space Power System and details its various functional components, the power modules, which include power sources, energy stores, power converters, and power switches. The behaviors of the various power modules are then considered. Finally, the way in which the power modules are connected using power channels, power interfaces, power links, and buses, is addressed.

Speaker: Dr Steve Parkes (STAR-Dundee)

114 Towards Efficient On-Board AI: Performance Benchmarks of the Jetson Orin NX for Space Applications

Speaker: Sebbe Van der Smissen (EDGX)

115 YoShI: YOLO-ODARIS Ship-detection Interface – An Innovative Approach to On-board Data Analysis for Ship-detection

edhpc_2025_poster_yoshi_scaglioni.pdf

Exhibition

19:00 Cocktail

Thursday 16 October

OBC

Conveners: Kostas Marinis (ESA), Rodolfo Martins (Evoleo Technologies GmbH)

116 NANOhpc-obc: Scalable Multicore RISC-V based Fault-Tolerant High Performance OBC Platform for In-Orbit AI Applications

Speaker: Bojan Kotnik (SkyLabs d.o.o.)

EDHPC2025_PPT_NANOhpc_Bojan_Kotnik_v2.pptx

117 OBCU-500: the New Space OBC by AIRBUS

Speaker: Matthieu NOUARD (Airbus Defence and Space)

ESA_EDHPC_OBCU-500_v1.3.pdf

118 FoX: A Modular Platform for a Commercial Space Computer

FoX (Flexible on-board avioniX) is a modular platform based on COTS components. A tailored SpaceVPX backplane is used, keeping only the features deemed necessary for the intended applications and use cases. To enable use of modern software architectures, Ethernet is the primary protocol for internal communication.

Speaker: Mr Vilhelm Geijer (Beyond Gravity Sweden)

FoX platform EDHPC 2025_V2.pptx

Advanced Processors & SoCs

Conveners: Peter Sinander (Frontgrade Gaisler), Richard Jansen (ESA)

119 GR765: A Radiation-Hardened, Fault-Tolerant Octa-Core SoC with Integrated eFPGA for Next-Generation Space Avionics

GR765_EDHPC_2025.pptx

120 Microchip’s PIC64-HPSC: A Versatile Compute Platform for the Next Era of Spaceflight Systems

EDHPC_VersatileCompute_HPSC_final N.pdf

121 European Space-Ready N7 Design Platform

Speaker: Mr Édouard LEPAPE (NanoXplore)

251011 N7 platform EDHPC2025.pdf

RF OBP (NAV/IoT)

Conveners: David Gonzalez-Arjona (GMV Aerospace and Defence), Max Ghiglione (ESA)

122 LEOSG: RFSoC Based Navigation Payload Signal Generator Demonstrator for a Future LEO-PNT System

The growing interest in Low Earth Orbit (LEO) constellations for telecommunication and navigation services, as evidenced by the efforts of both commercial and governmental entities, gives rise to novel challenges. These challenges involve the development of a novel Engineering Model (EM) with Radio Frequency (RF) signal generation capabilities for Position, Navigation, and Timing (PNT) applications. This paper introduces LEOSG, an Engineering Model Navigation Payload Signal Generator based on Radio Frequency System on Chip (RFSoC). The paper highlights the innovative design, flexibility, standard interface, and validation processes of LEOSG, which collectively address the present and future requirements for LEO-PNT signal generation.

Speaker: Mr David González Arjona (GMV Aerospace and Defence SAU)

LEOSG - RFSoC Based Navigation Payload Signal Generator Demonstrator for a Future LEO-PNT System Presentation (1).pptx

123 On-Board Signal Processing for Search and Rescue Unit (SARU)

paper_On-Board_Signal_Processing_SARU_v3_APPROVED.pdf

presentation_On-Board_signal_processing_SARU_v3_APPROVED.pdf

124 Applications of Ultra Wide Band technology in Lunar Exploration: An UWB Lunar Mission Demonstration.

LunarUWB_Mission_01.pdf

LunarUWB_Mission_01_CDS.pptx

Exhibition

10:20 Coffee Break

S/C Platform Control Unit

Conveners: Rafael Plonka, Mr Pasquale Tedesco (TELESPAZIO BELGIUM SRL)

125 Design & Qualification of a Satellite Security Unit for Lower-Class Missions

Design & Qualification of a Satellite Security Unit for Lower-Class Missions Presentation.pdf

126 Avionics Centralized Unit – All-in-one solution for satellite platform from AEROSPACELAB

The Avionics Centralized Unit (ACU) from Aerospacelab integrates all the essential functionalities to manage a satellite platform. It provides in one subsystem the features typically spread over multiple subsystems: on-board computer, S-band TTC transceiver, GNSS receiver, thermal management, various subsystems drivers (magnetorquers, HDRM), communication and power interfaces. Identical modules can be used multiple times to enable redundancy and increase reliability.

20251016-EDHPC-Avionics Centralized Unit - All-in-on solution for satellite platform_presentation.pptx

127 Design Drivers for SpaceVNX+, a Small Form Factor Electronics Unit for Space Applications

SpaceVNX+ [1] is a standard for small form factor equipment modules and units which is being designed specifically for space applications. Its modules are substantially smaller than a 3U Eurocard. SpaceVNX+ provides a standard platform for the implementation of the entire range of avionics applications on-board a spacecraft, from simple remote terminal units to high-performance payload data-handling units. SpaceVNX+ is intended to be complementary to larger form factor standards such as SpaceVPX [2] and ADHA [3]. This paper considers the critical design drivers for SpaceVNX+ that make it suitable for space applications, including thermal, size, modularity, connectivity, reliability and redundancy, and electrical constraints. The design of SpaceVNX+ is being driven by these considerations.

Speaker: Dr Steve Parkes (STAR-Dundee)

EDHPC 2025 Presentation SpaceVNX+ Design Drivers Parkes v4.pptx

128 Vega-E methalox engine controller

Speaker: Mr Jesus Ortiz Martín (Airbus Crisa)

Vega-E Methalox engine controller.pdf

Vega-E Methalox engine controller.pptx

AI Acceleration on FPGAs and HLS

Conveners: Prof. Luca Fanucci (University of Pisa), Melanie Berg (Space R2 LLC), Silvia Moranti (ESA)

129 On-orbit data processing utilizing FPGA-accelerated deep learning models

Speaker: Marko Mamić (Protostar Labs)

On-orbit data processing utilizing FPGA-accelerated deep learning models.pdf

On-orbit data processing utilizing FPGA-accelerated deep learning models.pptx

130 Enabling the Hardware Acceleration of Residual Layers within the FPG-AI Framework for Space Applications

Speaker: Lorenzo Ciacchini (University of Pisa)

EDHPC2025_Ciacchini_presentation - Copy.pptx

131 FPG-AI for On-Board AI Acceleration: A Case Study for Semantic Segmentation of Maritime and Terrestrial Areas

Speaker: Tommaso Bocchi (Università di Pisa)

EDHPC2025_Bocchi_presentation.pptx

132 Accelerating Neural Network Inference in space by offloading heavy operations on systolic arrays

AR_EDHPC2025_ISD-Airbus-ESA_131025.pptx

133 Efficiently Escaping Low-Level Design in Digital Microelectronics by Wise Auto-Coding of HDLs from High-Level Models

Digital microelectronics for space applications have traditionally been developed at the Register Transfer Level (RTL) through manual process using Hardware Description Languages (HDLs). While this approach has served as a one-size-fits-all solution, recent challenges such as increasing system complexity and reduced times-to-market have motivated the exploration of alternative methods.

This paper focuses on the auto-coding of reliable HDL from high-level models of digital microelectronics, addressing key questions like why, how, and in which space applications engineers are adopting auto-coding tools. Additionally, the paper also provides an overview of the ongoing production of the Handbook for Auto-Coding of HDLs for Space FPGAs, highlighting its main insights and implications for the field.

EDHPC25 - Efficiently Escaping Low-Level Design in Digital Microelectronics by Wise Auto-Coding HDLs from High-Level Models.pptx

RF OBP (SAR)

Conveners: Ken O'Neill (AMD), Gianluca Furano (ESA/Data Systems Division)

134 Synthetic Aperture Radar Back-Projection using Adaptive Intelligent Engines in AMD Versal Adaptive SoCs

This paper describes the implementation of a reference design for Synthetic Aperture Radar using a Back-Projection algorithm on Very Long Instruction Word (VLIW) vector processors in the AMD Versal™ XQRVC1902 adaptive SoC, which is qualified for space flight.

Speaker: Mr Ken O'Neill (AMD)

EDHPC 2025 Paper SAR Back Projection in AMD Versal Rollins and O'Neill v1.1 2025-09-15.pdf

Synthetic Aperture Radar Back Projection using AIE in AMD Versal™ Adaptive SoCs - IEEE EDHPC Submission v1 2025-09-15.pdf

135 Ongoing Activities for Closed Loop Artificial Intelligence Cognitive Synthetic Aperture Radar

Speaker: Chiara Giacanelli (Thales Alenia Space Italia)

C-SAR_EDHPC_Presentation.pdf

136 Low-Power System for Onboard Target Classification on SAR Data

Object-Detection-on-Raw-SAR-Echo-Data-using-Neural-Networks_V3.pdf

137 Tip & Cue AIS-Assisted Gaussian Process Regression for Ship Dynamics Modeling and Cognitive SAR Tasking

Speaker: Mr Matteo Sartoni (University of Bologna)

edhpc2025_presentation_sartoni.pdf

138 End-to-End Vessel Segmentation from Raw SAR Signals: A Preliminary Study

Speaker: Mr Alessio Auddino (TASI)

edhpc_slides_final.pdf

slides.pptx

Exhibition

12:30 Lunch

Mass Memory & Compression

Conveners: Julian Bozler (Airbus Space Systems), Dr Felix Siegle (ESA-ESTEC)

139 MMU-NXT – Power and Thermal Design of a Next Generation High Data-Performance Mass Memory Unit

The increasing data rate demands of upcomingEarth observation missions require next-generation mass memoryunits (MMUs) capable of significantly higher throughput thancurrent solutions. In response, the MMU-NXT project — devel-oped within the ESA GSTP framework — introduces a state-of-the-art memory system featuring high-performance componentssuch as a Versal FPGA, DDR4 RAM, QDRII+ SRAM, andhigh-speed SpaceFibre interfaces, supporting data rates up to20 Gbit/s and 48 Tbit storage capacity. This paper focuses onthe power architecture of the Mass Memory Module (MMM),addressing the challenges of delivering precise and efficientpower to multiple high-current and noise-sensitive voltage rails.In addition, the thermal management strategy, including heatextraction techniques for the FPGA and memory components, ispresented and validated through simulation. The results providea robust baseline for future high-performance satellite memorysystems.

Speaker: Markus Ahrens (DSI Aerospace GmbH)

EDHPC_MMU-NXT_-_Power_and_Thermal_Design_of_a_Next_Generation_High_Data_Performance_Mass_Memory_Unit_V2_251016.pptx

140 Challenges in the use of a Third Generation Flash Memory for space applications

Airbus_EDHPC_Third_Generation_Flash_Memory_Controller_presentation_issue02.pdf

141 Towards NVMe SSD in space

EDHPC2025_Towards NVMe SSD in space_v12.pptx

142 CCSDS124-Compliant Minimal-Footprint IP Core for Real-Time Telemetry-Data Compression

Speaker: Samuel Torres-Fau (IUMA - Universidad de Las Palmas de Gran Canaria)

EDHPC25_slides_v02_draft_p.pdf

EDHPC25_slides_v06.pdf

143 Beyond Data Handling: Micro-Datacenter in Space for Converged Missions

DHS_to_Edge_Datacenters slides 2025-10-15.pdf

AI Acceleration with GPUs & Dedicated HW

Conveners: Leonidas Kosmidis (Barcelona Supercomputing Center), Lyana Usa

144 Extension to Vector Operations of a Soft GPU Core for Machine Learning Acceleration in Space

Speaker: Mr Matteo Monopoli (University of Pisa)

Monopoli_EDHPC_2025.pdf

145 The Great Coral Reef: Modular AI/ ML Task Acceleration for Onboard Data Processing

Speaker: Bernát-Kristóf Vescan-Bakcsy (Shobolinsky)

EDHPC_Shobolinsky_TheGreatCoralReef_Final.pptx

146 Dynamic Power Allocation for High-Performance AI Inference on GPUs in Spaceborne Applications

Speaker: Ivan Rodriguez-Ferrandez (Coros Space)

Dynamic_Power.pptx

147 Hardware agnostic neural network embedding

Speaker: Lino Alves (LMO)

EDHPC2025_LMO_CNN_embedding.pptx

148 Leveraging CUDA Middleware to Enhance Fault Tolerance of GPUs Under Radiation Exposure

Speaker: Ivan Rodriguez-Ferrandez (Barcelona Supercomputer Center)

Leveraging CUDA Middleware to Enhance Fault Tolerance of GPUs Under Radiation Exposure.pptx

RF OBP (COM)

Conveners: Mr Raúl Regada Alvarez (Thales Alenia Space), Dr Adem Coskun (ESTEC)

149 Feasibility of Advanced COTS RF Transceivers for Radio Frequency Payload Processing

Speaker: Dr Adem Coskun (ESTEC)

EDHPC_Presentation_final.pdf

150 Heterogeneous Compute for Regenerative 5G-NTN Processing: A Versal-Orin Payload Design

Speaker: Mr Wouter Benoot (EDGX)

EDHPC 2025_ Heterogeneous Compute for Regenerative 5G-NTN Processing.pptx (3).pdf

151 Synthetic Data Generators for Enhanced Space-based Network Traffic Modeling

Synthetic data generators (SDGs) are indispensable tools in telecommunications and satellite communications, providing a means to simulate otherwise hard-to-obtain realistic traffic scenarios for pre-deployment testing and system optimization. This paper introduces a framework for generating synthetic bandwidth demand data by integrating macro-scale and micro-scale approaches. The macro-scale SDG models long-term trends, daily and weekly seasonality, random noise, and occasional spikes over an extended period of time, typically a year. In contrast, the micro-scale SDG captures short-term, minute-level variations within a day or week, adjusted for different application demands such as phone calls, video calls, and video streams. The proposed ensemble SDG merges these scales, producing synthetic datasets that provide high fidelity in both broad and granular temporal views of bandwidth demand. We further extend the model by scaling demand with population density and projecting it onto satellite beam footprints for SatCom applications. This paper details the mathematical formulations, implementations, and theoretical underpinnings of each SDG component, demonstrating their effectiveness and realism through experimentation. The proposed framework supports a wide range of applications, enhancing the ability to plan, optimize, and innovate in the field of (not only satellite) telecommunications.

OHBH_EDHPC_2025_SDG_presentation_pdf.pdf

152 Prodige processors family: from 5G/6G to GNSS & PNT applications

Paper_On-Board_Prodige_applications_Final (003).pdf

Presentation_On-Board_Prodige_applications_Final (003).pdf

153 Onboard Machine Learning for Satellite Edge Computing: The SPAICE Project Use Case

SPAICE_EDHPC_Pres.pdf

SPAICE_EDHPC_Pres.pptx

Exhibition

15:40 Coffee Break

SW Execution Platforms

Conveners: Carlos Domínguez (GMV), Maxime Perrotin (ESA)

154 Design and application of SAVOIR File Management System Library for ICE Cube OBCU

Speaker: Michał Kostrzewa (N7 Space)

EDHPC2025 ICECube and SAVOIR FMS slides.pdf

155 CUBO: Developing a generic building-block ecosystem for on-board processing products based on NG-Ultra

CUBO_Generic-ecosystem-for-NG-U-based-products_v8.pptx

156 Telemetry and telecommand packet utilization - on the upcoming update

Speaker: Arnaud Bourdoux (European Space Agency)

EDHPC2025_ABourdoux - PUS-C Rev1 Evolutions - Final.pptx

Performance & Computational Benchmarking

Conveners: Aubrey Dunne (Ubotica Technologies), Dr Maris Tali (ESA)

157 Towards Agile and Efficient AI Inference on Space-Grade Computing Platforms

Biography:
Mandar Harshe is a Senior Software Developer with over 10 years experience in developing high-performance applications on Edge devices, including experience in the entire pipeline of AI development - from training and development of AI models to writing optimized inference software in production environments.

Speaker: Dr Mandar Harshe (Klepsydra Technologies AG)

EDHPC2025AgileAiInference.pdf

158 On-Board Performance Benchmark (“OBPMark”) of Arm NEON SIMD on Teledyne e2v LS1046-Space and LX2160-Space Space-Grade Processors

Speaker: Manuel Blanco (Teledyne e2v)

EDHPC_2025_Presentation_vFinal.pdf

EDHPC_2025_Presentation_vFinal.pptx

159 Design and Implementation of an Open Source Machine Learning Benchmarking Suite for On-board Space Systems

Speaker: Jannis Wolf

EDHPC_OBPMark-ML_final-1.pdf

160 Evaluating Quantum-Inspired Algorithms for Autonomous Spacecraft Optimization: A Comparative Study of FPGA, CPU and GPU Implementations

Speaker: Tomoya Kawakami (Mitsubishi Electric Corporation)

251016_EDHPC2025_presentation.pptx

AI Engines & Neuromorphic

Conveners: Dr Juan Pedro Cobos Carrascosa (Frontgrade Gaisler), Laurent Hili (ESA)

161 GRAIN – towards event-based AI in space

Speaker: Daniel Andersson (Frontgrade Gaisler)

Frontgrade_Gaisler-GR801_EDHPC_clean_2.pptx

Frontgrade_Gaisler-GR801_EDHPC_clean_3.pptx

162 FPGA Prototype of CGR-AI Engine for Space Systems: Step Towards UDSM Implementation

Speaker: Ms Gabriela Mystkowska (University of Pisa)

CGR-AI_on_FPGA_EDHPC2025_vol2.pdf

FPGA Prototype of CGR-AI Engine for Space Systems Step Towards UDSM Implementation_paper.pdf

163 Ramon.Space RC64 and NuStream with Klepsydra AI: Rad-hard High Performance On-Board AI

Speaker: Pablo Ghiglino

EDHPC 2025 enormity presentation.pdf

164 Evaluation of Neuromorphic computing technologies for very low power AI/ML applications

Speaker: Roland Brochard (Airbus Defence & Space)

EDHPC_article_neuromorphic_v3.pdf

EDHPC_article_neuromorphic_v4.pdf

NEURAVIS_EDHPC_presentation_141025.pdf

Exhibition

19:00 Gala Dinner

Friday 17 October

Flight Software Use Cases

Conveners: Arnaud Bourdoux (European Space Agency), Michał Kostrzewa (N7 Space)

165 Flight Software for Swarms

EDHPC FSW for SWARMS - last version.pptx

IEEE EDHPC Flight Software for Swarms_last_version.pdf

166 The SVOM/ECLAIRs onboard software

2025-10-17_EDHPC_SVOM-ECLAIRs-onboard-software_Presentation_3.20.pptx

167 Advances in Category-A Flight Software Production and their Application to I-HAB

Software development to Category A following the ECSS standard represents the highest level of criticality for space applications, requiring the most rigorous verification and validation processes to avoid catastrophic consequences. This paper presents the advances made by GTD in developing systematic guidelines and tools for ECSS Category A flight software production, with specific application to the application software development and qualification for the I-HAB module contributed by ESA to the Lunar Gateway project. The work addresses historical pitfalls in past approaches to Category A qualification, introduces new open-source tools, and demonstrates practical adaptation to diverse computing environments including target processor systems and operating systems infrequently used by the European space industry.

Speaker: Andoni Arregi (GTD GmbH)

presentation-GTD.pdf

168 NAVIGA GNSS ASW: GNSS Receiver Application Software for Launch and Re-entry Vehicles based on AGGA-4

IEEE_EDHPC_Pulido_Naviga_Presentation.pptx

IEEE_EDHPC_Pulido_Naviga_Presentation_Final.pptx

AI Model Optimization & Reliability

Conveners: Evgenios Tsigkanos (OHB Hellas), Gabriela Mystkowska (University of Pisa)

169 Knowledge Distillation with Pseudo-Labeling for On-Board Earth Observation AI

Speaker: Aubrey Dunne (Ubotica Technologies)

Ubotica_101719_v2.pdf

170 Edge SpAIce: Deep Neural Network simplification pipeline for Onboard Data Reduction

Speaker: Nimesh Tahalooa (Agenium)

EDHPC_2025.pdf

EDHPC_2025.pptx

171 NASEO: Neural Architecture Search for Earth Observation Onboard Processing

EDHPC_NASEO_25.pptx

172 Reliability Enhancement of CNNs for Multispectral Images Segmentation on Earth Observation Microsatellites

NEW__EDHPC2025_Argotec_ReliabilityEnhancement.pptx

Exhibition

10:20 Coffee Break

Design Methodologies, Emulators & Simulators

Conveners: Jorge Lopez Trescastro (ESA), Pablo Ghiglino

173 SKE: emulation of on-board computer environments in operational simulators

SKE is a software application for general-purpose Linux host servers that allows to emulate the partitioned environment designed for computers on-board satellites running mixed-criticality systems that require time and space partitioning and fault detection and isolation. The benefits of using SKE are manyfold, from helping to develop in Linux environments the mentioned systems that will run on top of the XtratuM/NG (XNG) hypervisor, up to be exploited by operational simulators to run on-board computers faster than real time. In this latter context, this paper shows how SKE is being integrated in the CNES’s KOSMOS framework to provide the on-board computer environment inside a full numerical simulator of a swarm of satellites. SKE is aimed to provide the expected functionality of the XNG hypervisor, offering faster-than-real-time performances when executing the flight software and still keeping a good level of representativity in terms of functional behaviour.

Speakers: Carlos Cuesta-Martínez (FENTISS), Julien GALIZZI (CNES)

Cuesta-Martinez-et-al_SKE_EDHPC_2025-Presentation.pptx

174 An Open-Source Approach for Emulating Complex Embedded Systems: Enhancing Software Verification with Radiation-Induced Fault Injection

Speaker: Maxim De Clercq (EDGX)

An Open-Source Approach for Emulating Complex Embedded Systems_ Enhancing Software Verification with Radiation-Induced Fault Injection.pptx (5).pdf

175 Hardening On-Board Software: a Low-Overhead Compiler-based Approach

Speaker: Mr Emilio Corigliano (Politecnico di MIlano)

Corigliano_presentation.pdf

AI Development , Tools & Simulation

Conveners: Alexandre MEGE (Airbus Defence and Space), Filomena Decuzzi

176 On-Board Data Processing and AI Facility: A Modular Hardware-in-the-Loop Testbed for Space Applications at the Edge

Speaker: Lyana Usa

17102025_EDHPC_LUSA_OBPAI_V2.pptx

177 Composable AI Pipelines for Onboard Earth Observation Enabling Few-Shot, Hardware-Aware and Sensor-Agnostic Development via Knowledge Distillation

Speaker: Luca Colomba (AIKO Srl)

AIKO_EDHPC2025_Presentation_final_short.pdf

178 Preliminary Design of the Stellar Apps Software Platform for Developing and Executing On-board Applications

The German Aerospace Center (DLR) is developing Stellar Apps, an on-board application platform designed for space missions. Third-party applications and system services are deployed as Apps. These Apps can be executed in isolated environments with configurable access to the spacecraft and its computing resources. This allows users to regularly add, replace, remove, and update Apps to improve the flexibility and reusability of multipurpose spacecraft. Complex applications can be executed and tested in a secure environment, reducing their time to orbit. API-based communication between Apps and hardware allows the Stellar Apps platform to be used on a wide variety of spacecraft, including satellites, rovers, space stations, and entire satellite constellations. Access to commonly used artificial intelligence libraries and accelerators paves the way for future space applications. Stellar Apps provides end-to-end services ranging from development on the ground to deployment of Apps in space. The platform is currently available as a prototype at the German Aerospace Center (DLR) and is planned for an in-orbit demonstration during the second year of DLR's CAPTn-1 mission. This paper presents the preliminary design of the software platform.

Speaker: Mr Daniel Lüdtke (German Aerospace Center (DLR))

Stellar Apps @ EDHPC 2025.pptx

Exhibition

11:50 Wrap-Up & Farewell Lunch