EDHPC 2023 - European Data Handling & Data Processing Conference

1 Oct 2023, 08:00 → 6 Oct 2023, 19:00 Europe/Amsterdam

ANTIPOLIS - Palais des Congrès d'Antibes

EDHPC 2023

The first European Data Handling & Data Processing Conference – EDHPC 2023 – was held from the 2nd to the 6th of October 2023 in Juan-Les-Pins (French Riviera). It is organised by the European Space Agency (ESA), with the support of the local tourist office. Find the latest information on the official website.

Presentation Materials Access

 

The EDHPC presentation materials that the presenters wish to be shared publicly are available through the timetable. In case the presentation you wish to have access to is not shared in Indico, please get in contact with the presenter directly. 

Conference Proceedings

 

We are pleased to share that the proceedings EDHPC 2023 are available through IEEE Xplore here.

 

EDHPC IEEE LaTeX template

EDHPC IEEE Word Template

EDHPC2023 Conference Copyright Form.docx

Sunday 1 October

18:00 → 20:00 Welcome / Pre-Registration Drink

Monday 2 October

09:00 → 10:40 Keynote Presentations: Part I

09:00 Welcome and Introduction

Speakers: Ali Zadeh (ESA), Olivier Mourra (ESA-ESTEC- TEC directorate - Head of On-Board Computer & Data Handling Systems Section), Mr Piero Angeletti (ESA)

EDHPC Opening Presentation.pptx

09:20 Computing platform technologies of interest for the European Space industry

About the Key Note: With the megatrend of digitalization of satellites, the Space industry is jumping into the Moore’s law.
If Personal Computers coming into everyone’s home and now powerful Smartphone being in everyone’s hands have fully enjoy the Moore’s Law dynamic for decades, the Space industry is now facing a new paradigm of exponential development cost trend, increasing security breaches and challenges to secure critical technologies supply.
The speech will present the dynamic of computing platform technologies of interest for the European Space industry.

About the Presenter: Francois Martin is a senior semiconductor expert at STMicroelectronics who created in 2016, a dedicated ASIC activity, addressing the Space & Defense market, with a primary focus on European critical projects & programs. After more decades spent introducing innovative Bicmos technologies into mobile phones, he joined the core team that brought the innovative FD-SOI technology to several markets, from smartphone to Satellites processing equipments.

Speaker: Mr Francois Martin (STM)

EDHPC 2023 - computing process technologies.pptx

ESA EDHPC 2023 - keynote talk - computing technology-1.pdf

10:00 JPL Ingenuity Mars Helicopter

About the Keynote: The Ingenuity Mars Helicopter is the first aircraft to operate from the surface of another planet, having travelled to Mars as part of NASA’s Mars 2020 mission. In this talk, we will look back at the development of Ingenuity, the ongoing flight operations on Mars, and the impact that Ingenuity has had on the future of Mars exploration. We will focus on key technologies that Ingenuity has pioneered, including the use of commercial off-the-shelf electronics in a planetary exploration context.

About the Presenter:
Håvard Grip is a Robotics Technologist at NASA’s Jet Propulsion Laboratory in Southern California. He led the development of Ingenuity’s Aerodynamics & Flight Control system, and served as Chief Pilot during Ingenuity’s first 37 flights. He is currently the Chief Engineer of Autonomy & Aerial Flight for the Mars Sample Recovery Helicopters, part of the joint NASA-ESA Mars Sample Return campaign.

Speaker: Mr Håvard Grip (JPL)

keynote_nasa_grip-edhpc_final_compressed.pptx

10:40 → 11:10 Coffee Break

11:10 → 12:30 Keynote Presentations: Part II

11:10 RHA, COTS and their application to new space products

About the Presenter:
As the CEO and founder of Aerospacelab, Benoît Deper has been at the helm of the company since 2018. With his recognized experience in the space industry and his knowledge of the major players, this entrepreneur quickly succeeded in gaining the support of solid investors such as Airbus Ventures.
After graduating from UCLouvain's École polytechnique de Louvain (EPL), Benoît Deper first joined the ranks of two emblematic institutions in the sector: NASA and its European counterpart, ESA, for three years, before going on to become CTO of a Swiss company specializing in space launch, Swiss Space Systems (S3).
In 2018, Benoît embarked on the great entrepreneurial adventure as he created Aerospacelab. Since then, the company headquartered nearby Brussels (Mont-Saint-Guibert) is steadily increasing and has now over 200 employees. What's next? The inauguration of Aerospacelab’s megafactory in 2025!
emblematic institutions in the sector: NASA and its European counterpart, ESA, for three years, before going on to become CTO of a Swiss company specializing in space launch, Swiss Space Systems (S3). A career start marked by an entry into NASA's coveted "Ames" ecosystem, the cradle of many aerospace unicorns including American superstar, Planet.

Speaker: Mr Benoit Deper (Aerospacelab)

EDHPC_Aerospacelab.pdf

11:50 A retrospective of some key European achievements in the domain of Spacecraft On-board Data Handling and Data Processing

About the Keynote:
Taking the best of dramatically increasing capabilities of on-ground computing solutions while sustaining the space environment and operating with scarce physical sources has been the continuous challenge of spacecraft on-board data handling and processing over the last three decades. The speech will present a retrospective of some key European achievements and will highlight sometimes unexpected converging trends between classical satellites, space infrastructures, launchers and large constellations.

About the Presenter:
Remi Roques is Senior Expert Avionics and on-board data handling major spacecraft component manager at Airbus DS Space Systems. His career started in network protocol development research and was followed by many years on the European segment of the ISS (Columbus laboratory, ISS payloads) as system engineer and project manager. He then played an active role in the definition and deployment of several generations of Airbus product lines for data management and processing chains serving both institutional and commercial domains.

Speaker: Remi Roques (Airbus)

EDHPC 2023 - Retrospective - Slides V5.pdf

12:30 → 14:00 Lunch + Exhibition opening

14:00 → 16:00 EDHPC Tutorial - Lattice: Lattice Semiconductor hands-on tutorial on EDA tools and RISC-V system builder for space grade FPGAs

Introduction
Embedded system solutions play an important role in FPGA system designs for Space allowing designers to develop software for processors in FPGAs, provides flexibility and in-orbit programmability to implement distributed architectures via system bus.To develop an embedded system on an FPGA, user needs to design the System-on-Chip (SoC) with an embedded processor, develop system software on the processor and implement the complete architecture design in the FPGA.

Audience
The intended audience for this hands-on tutorial includes embedded system designers, embedded software developers and FPGA designers.

What will you learn?
In this hands-on tutorial you will learn the basics of LATTICE Propel™ and Radiant™ tools while developing a complete reference design.
Lattice Propel™ helps users develop a system with a RISC-V processor, SpaceWire IP, and a set of embedded tools.
Lattice Radiant™ helps the FPGA designer implement the developed architecture design.
No prior knowledge of LATTICE Propel™ and Radiant™ is required. Lattice will provide all required hardware and software for this hand-on tutorial.

Outline of hands-on tutorial
The tutorial will guide you through the development of a reference design:

How to build an embedded design with RISC-V and SpaceWire
How to develop the software for the processor subsystem
How to implement the architecture design in the FPGA
How to debug the system using the Propel™ environment

Note: Installation of software before attending the tutorial
To prepare for the hands-on tutorial, you need to install LATTICE Propel™ and Radiant™ on your computer prior to the event. LATTICE Propel™ and Radiant™ installation and free license will be provided upon completing your registration for the tutorial.

Conveners: Mr Fabien Lasvignes (Lattice Semiconductor), Mr Franck Perronnet (Lattice Semiconductor), Jim Tavacoli (Lattice Semiconductor), Mr Marco Boschini (Lattice Semiconductor), Mr Gianluca Furano (ESA)

14:00 → 16:00 EDHPC Tutorial: Artificial Intelligence workflows for FPGA & SoC using a Deep Learning Processor: Part 1

Introduction
Artificial intelligence (AI) is everywhere. The space industry is no exception. Automated recognition of lunar craters for moon landings and identification of space junk using imaging could play important roles in securing space safety and advancing space exploration. Deep Neural Networks (DNN) are the most successful solution for image-based object classification, and for most practical applications it requires performant platforms like FPGAs and SoCs.

Designing DNNs for embedded devices such as FPGAs and SoCs is challenging because of resource constraints, the complexity of programming in Verilog or VHDL, and the hardware expertise needed for prototyping on an FPGA or SoC.

Audience
Engineers who are developing AI algorithms and need to deploy on FPGA/SoC platforms
Level: both beginner and expert

What will you learn?
In this tutorial we will explain:
- Developing AI models using low code / no code workflows and interoperability with Python based frameworks (TensorFlow and PyTorch).
- Verifying and validating AI models.
- Prototyping and integrating Deep Learning-based vision applications using a Deep Learning Processor (DLP).
- Optimizing model performance on FPGA using compression methods like quantization and pruning.

Outline of hands-on tutorial
This tutorial explores developing a Deep Neural Network (DNN) algorithm leveraging FPGAs for space applications. It covers the deployment of DNN on FPGA platforms to accelerate tasks such as image analysis, object recognition, and data processing. Engineers at all skill levels can learn about optimizing, prototyping, and integrating DNN into FPGA-based systems, enabling efficient and high-performance space-related applications.

Speakers: Stephan van Beek and Pierre Harouimi from Mathworks

Conveners: Mr Pierre Harouimi (MathWorks), Stephan van Beek (MathWorks), Laurent Hili (ESA)

14:00 → 16:00 EDHPC Tutorial: Radiation Testing: Radiation Testing

Introduction
The tutorial will cover various aspect related to radiation testing and radiation mitigation on On-Board Data Handling and Data Processing Systems. We will cover topics on digital technologies, radiation testing planning and execution, Radiation Hardness Assurance, mitigation techniques and ESA Mission Classification. Special focus will be on complex devices often used in Data Handling and Processing Systems.

Audience
All on-board data handling and data processing professionals interested in learning more about different aspects of radiation testing and radiation mitigation in hardware flying on satellites today and in the future.

What will you learn?
The tutorial will cover various aspect related to radiation testing in the first part and radiation mitigation in the second part. The radiation testing portion of the tutorial will start with an overview of digital and analogue technologies, focusing on the different options for the space market from David Merodio and Richard Jansen (ESA). Then, we will get a thorough overview of the basic mechanisms of radiation-induced faults in complex devices with an emphasis on COTS component by Dr. Indranil Chatterjee (Airbus). You will learn the basic metrics for setting up successful Single Event Effect (SEE) test campaigns, running the tests and analysing the test data. Finally, you will about the necessity of updating our radiation hardness assurance methods for better characterization of today’s complex system applications by Melanie Berg (Space R2 LLC). The second half of the tutorial will focus on different aspects of radiation effects mitigation in complex COTS devices on both module and component level by Kostas Marinis and Lucana Santos (ESA). Finally, we will learn about the new ESA mission classification, including tailoring of the Q branch and its implications on the different radiation testing requirements including some words about ESA experiences by Viyas Gupta (ESA).

Speakers: David Merodio (ESA), Richard Jansen (ESA), Dr. Indranil Chatterjee (Airbus), Melanie Berg (Space R2 LLC), Kostas Marinis (ESA), Lucana Santos (ESA), Viyas Gupta (ESA)

Conveners: Dr Maris Tali (ESA), Richard Jansen (ESA)

14:00 Radiation Testing, Mitigation Techniques & RHA Tutorial Introduction

Speaker: Dr Maris Tali (ESA)

14:10 Single-Event Effects – Basic Mechanisms and Testing of Complex Devices

With the “New Space” approach, space is envisioned to become accessible and affordable to all with the development of low-cost satellite systems. A large part of this dream revolves around using commercially available high-performance electronic components and systems. However, a key barrier to the widespread usage of COTS parts in space is the harsh natural radiation environment. In this tutorial, an overview of the single-event effects impacting advanced semiconductor nodes will be discussed. Key metrics for designing SEE tests, such as sample preparation, biasing conditions, thermal impacts, internal fault tolerance mechanisms, etc. will be covered. Being able to determine the interplay of these variables is an integral part of designing a test to meet the needs of a specific mission. The short course will also explore designing test fixtures, selection of test facilities, executing tests, and analyzing test data. Efficacies and limitations of board-level SEE testing, as opposed to component-level SEE testing, for evaluating the vulnerability of COTS components for application in space, will also be discussed.

Speaker: Dr Indranil Chatterjee (Airbus)

EDHPC2023_SEE_Tutorial_Basic_Mechanisms_for_public_release.pdf

14:50 Modernization of Radiation Hardness Assurance Methods for SoC/FPGA Space Applications

For space systems, radiation particles can cause faults in microelectronics that inhibit operation and hence reduce system reliability. In turn, radiation hardness assurance methods have been developed to predict component susceptibility and perform system failure analyses. These practices have been applied for decades and are now in need of being modernized for better characterization of today’s complex system applications. This presentation describes what is required to test and analyze complex components such as SoC and FPGA devices, how conventional methods are insufficient, and how new methods can provide optimal coverage for failure analyses.

Speaker: Melanie Berg (Space R2 LLC)

MDBERG_RHA_EDHPC_SPR3_2023_PPT0100.pptx

15:30 ESA Mission Classification: focus on RHA tailoring & recommendations for COTS projects

An overview of the current updates regarding the radiation hardness assurance (RHA) tailoring of each of the ESA mission classes . ESA is now classifying missions according to five classes: “1” being the lowest risk class, down to “5” being the highest risk class. For each mission class, the ECSS requirements are in the process of being tailored including system engineering and product assurance requirements. This talk will briefly introduce the current tailoring with respect to RHA requirements.

The talk will also include a discussion on the tailoring impact on largely COTS-based projects.

Examples of RHA activities on COTS-based projects will be provided, as well as some advice and reminders, based on recent experience, primarily focused towards “New Space” companies.

Speaker: Viyas Gupta (ESA)

EDHPC_2023_RHA_classification_VGupta_v2.pdf

14:00 → 16:00 EDHPC Tutorial: Satellite Radio Frequency payloads and Instruments – Overview and challenges for data and signal processing: Part 1 - Satellite Communication

Introduction
The implementation of earth observation and telecommunication requirements into digital back-end technology demands an increase in bandwidths, more powerful digital data processing, and higher speed interfaces.
It is nowadays common to see Space-qualified data conversion devices and FPGAs, HSSL capable of converting signals in the GHz range, processing them and transferring them for transmission or further processing of the received data. This allows to move more functions to digital components and an improvement of flexibility from a system perspective.

This tutorial provides and overview of the most employed hardware architectures in radar and telecommunication payloads. It provides an explanation of the major design trade choices that are typically done when defining a radar system, taking into account the constraints from the existing hardware capabilities as well as missions requirements.

The first part of this tutorial will describe the end to end architectures of telecommunication payload, focusing on new requirements related to digital beamforming, regenerative processing and 5G protocols.

The second part of this workshop will describe the end to end architectures of earth observation payloads, in particular SAR, focusing on new requirements for upcoming missions.

Audience
The intended audience for this workshop is space industry professionals that want to understand or reflect on the impacts of digital processing functions in radio frequency payloads. The workshop is aimed in particular to suppliers of equipment and components interested in discussing requirements for upcoming missions.

What will you learn?
The tutorial will give an overview of end-to-end architecture for radio frequency payloads and highlight the design drivers in digital processors.

Outline of hands-on tutorial
This tutorial explores new trends in on-board processing for Radio Frequency Payloads. The main areas of development for upcoming Synthetic Aperture Radar and Telecommunication missions are presented and discussed.

Speakers: Salvatore D'Addio (ESA), Adem Coskun (ESA), Max Ghiglione (ESA)

Conveners: Dr Adem Coskun (ESA), Max Ghiglione (ESA), Dr Salvatore D'Addio (ESA)

Radio Frequency Payloads Tutorial EDHPC 2023.pdf

14:00 → 16:00 Exhibition

16:00 → 16:30 Coffee Break

16:30 → 18:00 EDHPC Tutorial - OBDP: Overview of On-Board Processing Technologies for future missions (ESA)

Introduction
The tutorial will start by introducing the concept of ESA mission class, followed by a presentation showing the mostly commonly used devices in ESA payloads, onboard computers (OBC) and instruments control unit (ICU). While rad hard parts may not need radiation mitigation techniques at board / equipment level, rad tolerant device on the contrary may require extra care to mitigate “single failure interrupt” (SEFI). SEFI mitigation techniques will be addressed in this presentation.

Audience
This tutorial is dedicated to young professionals and companies with limited experience related to space onboard processing technologies. The tutorial will provide the audience with a non-exhaustive but broad overview of the technologies used in ESA class 1,2,3, missions.

What will you learn?
Participants will learn about ESA mission class differentiation. Participants will learn about FPGAs, SoC FPGAs and processors used or planned to be used in ESA class 1,2,3 missions. Attendees learn about SEFI mitigation techniques.

Conveners: Mr David Merodio Codinachs (ESA), Laurent Hili (ESA)

On-board processing technologies V6.1.pptx

16:30 → 18:00 EDHPC Tutorial: Artificial Intelligence workflows for FPGA & SoC using a Deep Learning Processor: Part 2

Introduction
Artificial intelligence (AI) is everywhere. The space industry is no exception. Automated recognition of lunar craters for moon landings and identification of space junk using imaging could play important roles in securing space safety and advancing space exploration. Deep Neural Networks (DNN) are the most successful solution for image-based object classification, and for most practical applications it requires performant platforms like FPGAs and SoCs.

Designing DNNs for embedded devices such as FPGAs and SoCs is challenging because of resource constraints, the complexity of programming in Verilog or VHDL, and the hardware expertise needed for prototyping on an FPGA or SoC.

Audience
Engineers who are developing AI algorithms and need to deploy on FPGA/SoC platforms
Level: both beginner and expert

What will you learn?
In this tutorial we will explain:
- Developing AI models using low code / no code workflows and interoperability with Python based frameworks (TensorFlow and PyTorch).
- Verifying and validating AI models.
- Prototyping and integrating Deep Learning-based vision applications using a Deep Learning Processor (DLP).
- Optimizing model performance on FPGA using compression methods like quantization and pruning.

Outline of hands-on tutorial
This tutorial explores developing a Deep Neural Network (DNN) algorithm leveraging FPGAs for space applications. It covers the deployment of DNN on FPGA platforms to accelerate tasks such as image analysis, object recognition, and data processing. Engineers at all skill levels can learn about optimizing, prototyping, and integrating DNN into FPGA-based systems, enabling efficient and high-performance space-related applications.

Speakers: Stephan van Beek and Pierre Harouimi from Mathworks

Conveners: Pierre Harouimi (MathWorks), Stephan van Beek (MathWorks), Malte Bargholz (ESA)

16:30 → 18:00 EDHPC Tutorial: Radiation Testing: Radiation Mitigation Techniques & RHA

Introduction
The tutorial will cover various aspect related to radiation testing and radiation mitigation on On-Board Data Handling and Data Processing Systems. We will cover topics on digital technologies, radiation testing planning and execution, Radiation Hardness Assurance, mitigation techniques and ESA Mission Classification. Special focus will be on complex devices often used in Data Handling and Processing Systems.

Audience
All on-board data handling and data processing professionals interested in learning more about different aspects of radiation testing and radiation mitigation in hardware flying on satellites today and in the future.

What will you learn?
The tutorial will cover various aspect related to radiation testing in the first part and radiation mitigation in the second part. The radiation testing portion of the tutorial will start with an overview of digital and analogue technologies, focusing on the different options for the space market from David Merodio and Richard Jansen (ESA). Then, we will get a thorough overview of the basic mechanisms of radiation-induced faults in complex devices with an emphasis on COTS component by Dr. Indranil Chatterjee (Airbus). You will learn the basic metrics for setting up successful Single Event Effect (SEE) test campaigns, running the tests and analysing the test data. Finally, you will about the necessity of updating our radiation hardness assurance methods for better characterization of today’s complex system applications by Melanie Berg (Space R2 LLC). The second half of the tutorial will focus on different aspects of radiation effects mitigation in complex COTS devices on both module and component level by Kostas Marinis and Lucana Santos (ESA). Finally, we will learn about the new ESA mission classification, including tailoring of the Q branch and its implications on the different radiation testing requirements including some words about ESA experiences by Viyas Gupta (ESA).

Speakers: David Merodio (ESA), Richard Jansen (ESA), Dr. Indranil Chatterjee (Airbus), Melanie Berg (Space R2 LLC), Kostas Marinis (ESA), Lucana Santos (ESA), Viyas Gupta (ESA)

Conveners: Dr Maris Tali (ESA), Richard Jansen (ESA)

16:30 SEE mitigation techniques for complex COTS digital devices

Speaker: Kostas Marinis (ESA)

Tutorial on mitigation techniques-EDHPC 2023-v.0.5.pptx

17:00 Radiation Mitigation Techniques – Reference Designs

Speaker: Lucana Santos Falcon (Moltek Consultants Ltd. for European Space Agency)

EDHPC tutorial_ref_designs.pptx

17:30 Radiation Testing Talk

Speaker: Richard Jansen (ESA)

EDHPC tutorial - Microelectronics Radiation Mitigation v4.pdf

16:30 → 18:00 EDHPC Tutorial: Satellite Radio Frequency payloads and Instruments – Overview and challenges for data and signal processing: Part 2 - Earth Observation

Introduction
The implementation of earth observation and telecommunication requirements into digital back-end technology demands an increase in bandwidths, more powerful digital data processing, and higher speed interfaces.
It is nowadays common to see Space-qualified data conversion devices and FPGAs, HSSL capable of converting signals in the GHz range, processing them and transferring them for transmission or further processing of the received data. This allows to move more functions to digital components and an improvement of flexibility from a system perspective.

This tutorial provides and overview of the most employed hardware architectures in radar and telecommunication payloads. It provides an explanation of the major design trade choices that are typically done when defining a radar system, taking into account the constraints from the existing hardware capabilities as well as missions requirements.

The first part of this tutorial will describe the end to end architectures of telecommunication payload, focusing on new requirements related to digital beamforming, regenerative processing and 5G protocols.

The second part of this workshop will describe the end to end architectures of earth observation payloads, in particular SAR, focusing on new requirements for upcoming missions.

Audience
The intended audience for this workshop is space industry professionals that want to understand or reflect on the impacts of digital processing functions in radio frequency payloads. The workshop is aimed in particular to suppliers of equipment and components interested in discussing requirements for upcoming missions.

What will you learn?
The tutorial will give an overview of end-to-end architecture for radio frequency payloads and highlight the design drivers in digital processors.

Outline of hands-on tutorial
This tutorial explores new trends in on-board processing for Radio Frequency Payloads. The main areas of development for upcoming Synthetic Aperture Radar and Telecommunication missions are presented and discussed.

Speakers: Salvatore D'Addio (ESA), Adem Coskun (ESA), Max Ghiglione (ESA)

Conveners: Dr Adem Coskun (ESTEC), Max Ghiglione (ESA), Dr Salvatore D'Addio

Radio Frequency Payloads Tutorial EDHPC 2023.pdf

16:30 → 18:00 Exhibition

18:00 → 20:00 EDHPC Opening cocktail with announcement of DSI (Platinum Sponsor) with Mr. Elias Hashem

Tuesday 3 October

09:00 → 09:20 DFTS: Opening

Opening remarks

Conveners: Gianluca Furano (ESA/Data Systems Division), Prof. Marco Ottavi (UTWENTE)

DFTS-MT-2023.pptx

09:00 → 10:20 Exhibition

09:00 → 10:20 Session 1 - Satellite End-to-end data handling and processing architectures: ESA Missions

Conveners: Julian Bozler (Airbus Space Systems), Kostas Marinis (ESA)

09:00 End-to-end data processing architecture of the ESA exo-planet hunting mission PLATO

Speaker: Mr Claas Ziemke (DLR)

Presentation_2023-10-03-End-to-end_data_processing_architecture_of_the_ESA_exo-planet_hunting_mission_PLATO.pdf

09:20 Solar Orbiter Data Handling Lessons Learned

Speakers: Dr Felix Siegle (ESA-ESTEC), Mr Daniel Lakey (ESA-ESOC)

Solar Orbiter Data Handling Lessons Learned.pptx

09:40 An overview of the electrical, electronic and on-board data handling architecture of the Ariel Payload

Speaker: Mauro Focardi (INAF/OAA - Osservatorio Astrofisico di Arcetri)

M. Focardi - EDHPC - Ariel Payload Architecture.pptx

10:00 Meteosat Third Generation: Data Handling Architecture of a State-of-the-Art GEO Meteorological Satellite

Speaker: Alex Palacios (ESA)

Copyright waiver.pdf

EDHPC 2023 - MTG-I DH architecture - paper v2.pdf

09:00 → 10:20 Session 2 - OBDP: On-Board Processing Applications and Usage in Missions

Conveners: David Steenari (ESA), Enrico Magli

09:00 AI uses cases on EO satellites

Speaker: Olivier Cambon (Airbus Defence and Space)

EDHPC2023 - AI uses cases on EO satellites.pdf

09:20 On-board data processing for meteor detection on SLAVIA mission

Speakers: Tomáš Kašpárek (BUT FIT), Martin Javorka (Zaitra s.r.o.)

EDHPC SLAVIA OBDP - updated (2).pdf

09:40 A Dual Camera System with AI enabled Imaging Control for Earth Observation Applications: A Feasibility Study

Speaker: Mr Mathieu Bernou (OHB Hellas)

EDHPC2023_OHB-Hellas.pdf

10:00 Robust Machine Learning Systems For Dependable Space Applications

Speaker: Nick Panagiotopoulos (European Space Agency)

09:20 → 10:20 DFTS: Keynote 1: Secure SoC Development Lifecycle: Challenges and Solutions (Prof. Mark M. Tehranipoor)

Opening remarks

Conveners: Marco Ottavi (UTWENTE), Prof. Mark Tehranipoor (Intel/U Florida)

DFTS-MT-2023.pptx

10:20 → 10:50 Coffee Break

10:50 → 12:30 DFTS: Session 1: Reliable and Secure Deep Neural Networks

Opening remarks

Convener: Matteo Sonza Reorda

DFTS-MT-2023.pptx

10:50 Fault Secured JPEG-Codec Hardware Accelerator with Piracy Detective Control using Secure Fingerprint Template. Rahul Chaurasia, Abhinav Reddy Asireddy and Anirban Sengupta

Speaker: Rahul Chaurasia

1_Session1_Chaurasia.pptx 2.pptx

11:10 EnSAFe: Enabling Sustainable SoC Security Auditing using eFPGA-based Accelerators., Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar and Farimah Farahmandi

Speaker: Farimah Farahmandi

2_Session1_Farahmandi.pptx

11:30 Improving the Detection of Hardware Trojan Horses in Microprocessors via Hamming Codes., Alessandro Palumbo, Luca Cassano, Pedro Reviriego and Marco Ottavi

Speaker: Luca Cassano

3_Session1_Cassano1.pptx

11:50 Built-in Software Obfuscation for Protecting Microprocessors against Hardware Trojan Horses., Alessandro Palumbo, Marco Ottavi and Luca Cassano

Speaker: Marco Ottavi (UTWENTE)

4_Session1_Cassano2.pptx

12:00 On Attacking Scan-based Logic Locking Schemes., Govind Rajhans Jadhav, Sonali Shukla and Virendra Singh

Speaker: Virendra Singh

5_Session1_Singh.pptx

12:10 An Efficient Security Closure Methodology for EM-based Attacks on Power Grid Structures., Alexandra Takou, Pavlos Stoikos, Moysis Moysis, George Floros, Nestor Evmorfopoulos and Georgios Stamoulis

Speaker: Alexandra Takou

6_Session1_Takou.pptx

12:20 A Self Aware Security Approach for Real Time Neural Network Applications from Row Hammer Attacks in Multi FPGA Multi User Environment., Krishnendu Guha and Gouriprasad Bhattacharyya

Speaker: Krishnendu Guha

10:50 → 12:30 Exhibition

10:50 → 11:50 Session 3 - Satellite End-to-end data handling and processing architectures: ESA Missions

Conveners: Benoit Leroy, Olivier Mourra (ESA-ESTEC- TEC directorate - Head of On-Board Computer & Data Handling Systems Section)

10:50 Electrical Architecture and Harness Enhancements

Speaker: Rainer Lang (Airbus Defence and Space GmbH)

Electrical Architecture and Harness Enhancements Presentation Rainer Lang EDHPC 2023.pdf

11:10 High dependability DHS, in orbit operations

Speaker: JEAN-FRANCOIS SOUCAILLE (AIRBUS DEFENCE AND SPACE)

95-High Dependability DHS for In Orbit Operations_slides_V1.pdf

11:30 DHS architecture for HERA Deep Space Mission

Speaker: Rafael Plonka

EDHPC OHB presentation_HERA.pdf

10:50 → 12:30 Session 4 - OBDP: Novel Frameworks for On-Board Processing

Conveners: Aubrey Dunne (Ubotica Technologies), Dr Maris Tali (ESA)

10:50 OBPMark and OBPMark-ML -- On-Board Processing Computational Benchmarks for Space Appliactions and Results

Speaker: David Steenari (ESA)

2023-10-03_EDHPC2023_OBPMark_v1.6.pptx

11:10 A Modular, Reconfigurable and Portable Framework for On-Board Data Processing: Architecture and Applications

Speaker: Ms Charlotte Crawshaw (Craft Prospect)

EDHPC2023 slides CPL v2.pdf

11:30 The Development of an Onboard Processing Environment within the Flexible and Intelligent Payload Chain Sub-system for Small EO Satellites

Speaker: Rebecca Davidson (Surrey Satellite Technology Limited)

Slides_The Development of an Onboard Processing Environment within the Flexible and Intelligent Payload Chain Sub-system for Small EO Satellites.pdf

11:50 A novel multi-mission platform for the development of applications, services, and new satellite data algorithms directly in orbit and on-demand, the Italian In-Orbit Space Lab

Speaker: Dr Vito Fortunato (Planetek Italia)

P22S2245-28-v1_EDHPC23_IOSL_fortunato.pdf

12:10 Insight4EO Architecture to Support Onboard AI Multiapplications from the End-User

Speaker: Mr Juan Ignacio Bravo Pérez-Villar (Deimos Space)

12:30 → 14:00 Lunch

14:00 → 15:40 DFTS: Session 2: Advanced Testing and Validation Techniques

Opening remarks

Convener: Athanasios Papadimitriou

DFTS-MT-2023.pptx

14:00 An Evaluation of a Testability Measure for State Assignment to Estimate Transition Fault Coverage for Controllers., Toshinori Hosokawa, Kyohei Iizuka and Masayoshi Yoshimura

Speaker: Toshinori Hosokawa

1_Session2_Hosokawa.pptx

14:20 A Block Partitioning Method for Region Exhaustive Test to Reduce the Number of Test Patterns and to Improve Gate Exhaustive Fault Coverage., Momona Mizota, Toshinori Hosokawa, Masayoshi Yoshimura and Masayuki Arai

Speaker: Momona Mizota

2_Session2_Mizota 1.pptx

14:40 Evaluating the Impact of Aging on Path-Delay Self-Test Libraries., Lorena Anghel, Riccardo Cantoro, Michele Portolan, Sandro Sartoni and Matteo Sonza Reorda

Speaker: Sandro Sartoni

3_Session2_Sartoni.pptx

15:00 An Evaluation of Estimated Field Random Testability for Data Paths at Register Transfer Level Using Status Signal Sequences Based on k-Consecutive State Transitions for Field Testing., Yudai Toyooka, Haruki Watanabe, Toshinori Hosokawa and Masayoshi Yoshimura

Speaker: Masayoshi Yoshimura

4_Session2_Toyooka.pptx

15:10 Black-Box IP Validation with the SafeTI Traffic Injector: A Success Story., Francisco Fuentes, Sergi Alcaide, Raimon Casanova and Jaume Abella.

Speaker: Francisco Fuentes

5_Session2_Fuentes.odp

15:20 Partial Triple Modular Redundancy (TMR) Method for Fault-Tolerant Circuit based on HITS Algorithm., Yu Xie, Wen-Yue Yu, Ning Zhang, He Chen and Yi-Zhuang Xie

Speaker: Ning Zhang

6_Session2_Yu Xie.pptx

15:30 Gradient Descent Iterative Correction Unit for Fixed Point Parity Based Codes., Oana Boncalo and Alexandru Amaricai

Speaker: Oana Boncalo

7_Session2_SpeakerBoncalo.pdf

14:00 → 15:40 Exhibition

14:00 → 15:40 Session 5 - Satellite End-to-end data handling and processing architectures: ADHA

Conveners: Mr Alexandre Gausset (TAS-BE), Jesus Ortiz Martín (Aitbus Crisa), Olivier Mourra (ESA-ESTEC- TEC directorate - Head of On-Board Computer & Data Handling Systems Section)

14:00 ADHA Status, Current Activities and Industrial Road Map

Speakers: Olivier Mourra (ESA-ESTEC- TEC directorate - Head of On-Board Computer & Data Handling Systems Section), David Steenari (ESA)

01-ADHA Status Presentation VF.pptx

14:20 ADHA System Architecture and Unit Design

Speaker: Dario Pascucci (Thales Alenia Space)

ADHA System Architecture and design description - Presentation.pdf

14:40 ADHA - Backplane Definition and Design

Speakers: Dario Pascucci (Thales Alenia Space), Ms Ketty DE MATTIA

ADHA - Backplane Definition and Design.pdf

15:00 ADHA, an Agile Platform Enhancing New Satellite On-Board Data Processing Systems

Speakers: Olivier Mourra (ESA-ESTEC- TEC directorate - Head of On-Board Computer & Data Handling Systems Section), David Steenari (ESA), Felix Siegle (ESA-ESTEC)

04-EDHPC_2023___ADHA_an_Enabler_of_Future_OBDP_solutions V5.pptx

15:20 An Avionics Ecosystem for Small- and Micro-Satellites Based on ADHA 3U Modules

Speaker: David Steenari (ESA)

ESA-EDHPC2023-An_Ecosystem_for_Micro_and_Small-Satellites_Based_on_ADHA-3U_Modules_and_Units-Steenari_et_al-v1.4.pptx

14:00 → 15:20 Session 6 - OBDP: Advances in On-Board Processing for Visual Based Navigation and Monitoring

Conveners: Carlos Urbina Ortega (ESA), Laurent Hili (ESA), Rebecca Davidson (Surrey Satellite Technology Limited)

14:00 Intelligent Space Camera for On-Orbit AI-Driven Visual Monitoring Applications

Speaker: Mr Juan Romero-Cañas (Ubotica Technologies)

EDHPC 2023 - ISC V2.0.pptx

14:20 A synthetic image data generation pipeline for spacecraft fly-by scenarios

Speaker: Mr Ric Dengel (Tartu Observatory)

FlyByGen_EDHPC_Presentation_v1-0.pptx

14:40 ECSS Compliance using Model-Based Design: A Vision-Based Navigation System on an FPGA

Speaker: Dr Juan Valverde (MathWorks)

EDHPC_PAPER_FINALPRESET.pptx

15:00 Vision Based Lunar Landing using RC64 Rad Hard DSP/ML Manycore Processor

Speaker: Prof. Ran Ginosar (Ramon Space)

Ramon.Space EDHPC Vision Based Lunar Landing 20232-09-22.pptx

15:40 → 16:10 Coffee Break

16:10 → 17:30 DFTS: Session 3: Protecting Accelerators and Microprocessors against hardware attacks

Opening remarks

Convener: Haralampos Stratigopoulos

DFTS-MT-2023.pptx

16:10 Analyzing the Reliability of Alternative Convolution Implementations for Deep Learning Applications., Cristiana Bolchini, Luca Cassano, Antonio Miele, Alessandro Nazzari and Dario Passarello

Speaker: Luca Cassano

1_Session3_Cassano.pptx

16:30 Uncovering hidden vulnerabilities in DNNs through evolutionary-based Image Test Libraries., Vittorio Turco, Annachiara Ruospo, Gabriele Gavarini, Ernesto Sanchez and Matteo Sonza Reorda

Speaker: Matteo Sonza Reorda

16:50 Investigating the effect of approximate multipliers on the resilience of a systolic array DNN accelerator., Salvatore Pappalardo, Ali Piri, Annachiara Ruospo, Ian O'Connor, Bastien Deveautour, Alberto Bosio and Ernesto Sanchez

Speaker: Salvatore Pappalardo

17:10 Analysis and Improvement of Resilience for Long Short-Term Memory Neural Networks., Mohammad Hasan Ahmadilivani, Jaan Raik, Masoud Daneshtalab and Alar Kuusik

Speaker: Mohammad Hasan Ahmadilivani

4_Session3_Ahmadilivani.pptx

16:10 → 17:30 Exhibition

16:10 → 17:30 Session 7 - Satellite End-to-end data handling and processing architectures: ADHA

Conveners: Mr Dario Pascucci (Thales Alenia Space), Julian Bozler (Airbus Space Systems), Olivier Mourra (ESA-ESTEC- TEC directorate - Head of On-Board Computer & Data Handling Systems Section)

16:10 Reliability Assessment of High Data Rate cPCI Serial Space Connectors

Speaker: Dr Léo Farhat (ESA)

EPDHC ADHA HDR cPCI Connector_10_2023_LF-vf.pptx

16:30 GR740 PCM - ADHA Compliant Next Generation Processing Module

Speaker: Mr Alfonso Gonzalo Palomo (Airbus Crisa)

GR740 Payload Controller Module - ADHA Compliant Next Generation Processing Module (EDHPC 2023).pdf

16:50 ADHA On-board Computer (OBC) Module

Speaker: Kostas Marinis (ESA)

EDHPC 2023-AOBCM-v.3.pptx

17:10 A new concept of Remote Interface Units

Speaker: Jesus Ortiz Martín (Airbus Crisa)

A new concept of Remote Interface Units.pdf

16:10 → 17:30 Session 8 - OBDP: AI Applications for On-Board FDIR (Failure Detection, Isolation, and Recovery)

Conveners: Pierre Dandré, Gianluca Furano (ESA/Data Systems Division), Laurent Hili (ESA)

16:10 An Overview of Machine Learning Techniques for on-board anomaly detection in satellite telemetry

Speaker: Mr James Murphy (Réaltra Space Systems Engineering/University College Dublin)

ESA EDHPC.pdf

16:30 On-Board Anomaly Detection on a Flight-Ready System

Speaker: Andreas Koch (Airbus Defence and Space)

On-Board Anomaly Detection on a Flight-Ready System.pptx

16:50 AI-based On-board Reconfigurable FDIR and Lifetime Prediction for Constellations

Speaker: Chiara Brighenti (S.A.T.E. S.r.l.)

EDHPC2023_AI_based_FDIR_lifetime_prediction_05cb231003.pptx

17:10 Autonomy for On Orbit Service Assembly and Manufacture: A Smallsat Perspective

This talk explores the pivotal role of autonomy in the realm of on-orbit service assembly and manufacture, focusing on the unique context of small satellites (Smallsats). As the space industry witnesses a surge in Smallsat missions, achieving greater autonomy is becoming essential for their successful deployment and operation. This talk delves into the challenges and opportunities associated with enabling Smallsats to autonomously assemble and manufacture HW, SW components while in orbit, shedding light on the technological advancements and strategic considerations driving this evolving field.

Speaker: Bogdan Udrea

2023_EDHPC_VisSidus.pdf

17:30 → 19:00 Cocktail sponsored by ISD (Platinum Sponsor) - Verbal gratitude at the start of the cocktail break by Mr Laurent Hili (ESA)

Wednesday 4 October

09:00 → 10:20 DFTS: Keynote 2: Radiation Effects in FPGA and SoCs

Opening remarks

Conveners: Gianluca Furano (ESA/Data Systems Division), Pierre Maillard (AMD, INc.)

DFTS-MT-2023.pptx

09:00 → 10:20 Exhibition

09:00 → 10:20 Session 10 - Satellite End-to-end data handling and processing architectures: Industrialisiation

Conveners: Mr Claudio Monteleone (ESA/Data Systems Division), Jochen Rust (DSI Aerospace Technologie GmbH)

09:00 Unified roadmap for new generation platform DHS

Speaker: Remi Roques (Airbus)

EDHPC 2023 - 66 -Unified DHS - Slides V7.pdf

09:20 On-Board Data Handling Architectures, towards integration and modularity.

Speakers: Mr Francesco Gigliotti (Thales Alenia Space), Mr Mauro De Muro (Thale Alenia Space), Mr Alessandro Marini (Thales Alenia Space)

09:40 Flight hardware optimization through modularity and building blocks

Speaker: Mr Arnaud Wagner (AIRBUS DEFENCE AND SPACE)

#86_EDHPC_MODULARITY_V1.pdf

10:00 Data Center in Space (DCiS)

Speaker: Prof. Ran Ginosar (Ramon Space)

Ramon.Space EDHPC DCiS 2023-09-22.pptx

09:00 → 10:20 Session 11 - Component Developments for OBDH Systems

Conveners: Luca Cattaneo (Microchip), Richard Jansen (ESA), Lucana Santos Falcon (Moltek Consultants Ltd. for European Space Agency)

09:00 A High Efficiency, Versatile and Space Tolerant Point of Load based on Commercial Off-The Shelf Technologies - POLLUX

Speaker: Lucien Lecocq

#88_EDHPC2023 - High Efficiency, Versatile and Space Tolerant Point Of Load_v2.pdf

09:20 64 Gbit Radiation Intelligent Memory Stack for Data Handling applications

Speaker: Jeanne Tongbong

64 Gbit Radiation Intelligent Memory Stack for Data Handling applications_3D PLUS.pdf

09:40 Advanced and Safe Satellite Electronics Design by LCL Utilisation on Component Level

Speaker: Mr Bojan Kotnik (SkyLabs d.o.o.)

EDHPC2023_Advanced_and_Safe_Satellite_Electronics_Design_by_LCL_v3.pptx

10:00 1 Gbit to 64Gbit high Reliability Configuration solutions for the latest generation of FPGAs

Speaker: Jeanne Tongbong

1 Gbit to 64 Gbit high Reliability Configuration solutions for the latest generation of FPGAs_3D PLUS.pdf

09:00 → 10:20 Session 9 - Satellite End-to-end data handling and processing architectures: Radio Frequency Payloads

Conveners: Dr Adem Coskun (ESTEC), Ken O'Neill (AMD), Max Ghiglione (ESA)

09:00 On-Board Processing for Communication Satellites – Principles and Challenges

Speaker: Richard Wiest (Airbus Defence and Space GmbH)

EDHPC2023_telecomobp_Dig_rev22092023_p.pptx

09:20 SMOS HR Correlator architecture Processing Study

Speaker: Alexandre MEGE (Airbus Defence and Space)

#107_SMOS-HR Correlator Architecture Processing Study_newtemplate.pptx

09:40 Accelerated Deep-Learning inference on FPGAs in the Space Domain

Speaker: Mr Michael Petry (Airbus Defence and Space)

EDHPC23_Presentation_Petry.pptx

10:00 EUFRATE: a High-Perfomance Reconfigurable Architecture for Radiation-hardened Telecom Payloads

Speaker: Eugenio Scarpa (ARGOTEC SRL)

10:20 → 10:50 Coffee Break sponsored by Lattice Semiconductor (Gold Sponsor) - Verbal gratitude at the start of the coffee break by Mr Gianluca Furano (ESA) - Announcement by Mr. Jim Tavacoli from Lattice Semiconductor

10:50 → 12:30 DFTS: Session 4: Defects, Errors and Aging

Opening remarks

Convener: Elena-Ioana Vatajelu

DFTS-MT-2023.pptx

10:50 Highly Efficient Layered Syndrome-based Double Error Correction Utilizing Current Summing in RRAM Cells to Simplify Decoder, Shruti Dutta, Sai Charan Rachamadugu Chinni, Abhishek Das and Nur Touba

Speaker: Nur Touba

11:10 DDSR: An Online GPGPU Instruction Decoder Error Detecting and Correcting Architecture., Raghunandana K K, Yogesh Prasad K R, Matteo Sonza Reorda and Virendra Singh

Speaker: Raghunandana K K

11:30 Image Degradation in Time Due to Interacting Hot Pixels., Glenn Chapman, Li-Yu Wu, Israel Koren, Zahava Koren and Klinsmann J. Coelho Silva Menes

Speaker: Glenn Chapman

11:50 An Estimation Method of Defect Types Using Artificial Neural Networks and Fault Detection Information., Natsuki Ota, Toshinori Hosokawa, Koji Yamazaki, Yukari Yamauchi and Masayuki Arai

Speaker: Masayuki Arai

12:10 An efficient High-Volume Production Performance Screening using On-Chip Ring Oscillators., Tobias Kilian, Abhishek Sengupta, Daniel Tille, Martin Huch and Ulf Schlichtmann

Speaker: Tobias Kilian

10:50 → 12:30 Exhibition

10:50 → 12:30 Session 12 - OBDP: Radio Frequency Payloads

Conveners: Dr Adem Coskun (ESTEC), Max Ghiglione (ESA), Richard Wiest (Airbus Defence and Space GmbH)

10:50 The Universal Processing Module – Standardised Hardware for State of the Art Radar Data Conversion and Data Processing

Speaker: Malte Esslinger (Airbus DS - Germany)

UPM EDHPC 2023 Presentation.pdf

11:10 A Software Defined Radio for CCSDS 131.2-B protocol: exploiting Graphic Processing Unit accelerator for high performance data reception.

Speaker: Roberto Ciardi (University of Pisa)

EDHPC_RxGPU_presentation.pptx

11:30 Hardware Accelerated Backprojection Algorithm on UltraScale SoC-FPGA for On-Board SAR Image Formation

Speaker: Prof. Rui Policarpo Duarte (INESC-ID/ISEL)

SAR_EDHPC_PPT.pdf

11:50 Application of AMD Versal Adaptive SoC to Radar Space Time Adaptive Processing and Beamforming Applications in Space

Speaker: Mr Ken O'Neill (AMD Xilinx)

Application of AMD Versal to Radar Space Time Adaptive Processing - ESA EDHPC Submittal 2023-08-24 presentation.pdf

12:10 A Practical Framework to Specify the Prototype Filters for the Analysis of Frequency Stacked Sub-bands

Speaker: Dr Adem Coskun (ESTEC)

EDHPC_A_Practical_Framework_to_Specify_the_Prototype_Filter_for_the_Analysis_of_Frequency_Stacked_Sub_bands.pdf

10:50 → 12:10 Session 13 - Satellite End-to-end data handling and processing architectures: Small- and micro-satellites

Conveners: Alberto Valverde Carretero (ESA), Tomasz Szewczyk (ESA ESTEC)

10:50 Standardization concepts for CubeSat applications

Speaker: Tomasz Szewczyk (ESA ESTEC)

EDHPC Cubesat v4.pptx

11:10 An End-To-End Cubesat Data-Processing Chain for Module Development and Validation

Speaker: Mr Ric Dengel (Tartu Observatory)

FlatSat-presentation-edhpc.pptx

11:30 COTS GPU Processor Development for On-board Demonstration

Speaker: Akira Chiba (Mitsubishi Electric Corporation)

final_slide_AkiraChiba.pdf

11:50 Modular Avionics Test Bench

Speaker: Ran Qedar (Space Products and Innovation GmbH)

10:50 → 12:30 Session 14 - Radiation Tests and Evaluation for OBDH Systems

Conveners: Melanie Berg (Space R2 LLC), Timo Dirkes (DSI Aerospace Technologie GmbH), Dr Maris Tali (ESA)

10:50 Radiation evaluation of LEON5FT/NOEL-VFT demonstrator on STM 28nm-FDSOI technology platform

Speaker: Fabio Malatesta (Frontgrade Gaisler AB)

EDHPC2023_GR765-SQUAL4c_presentation.pdf

11:10 An In-Depth Description of the Radiation Data Package for the QLS1046-Space Edge Processing Module

Speakers: Mr Thomas Porchez (Teledyne e2v), Mr Wilfrid BERTRAND (Teledyne e2v), Mr Thomas GUILLEMAIN (Teledyne e2v)

23 09 EDHPC - Presentation - QLS1046 Full Radiation Package v1.0.pdf

11:30 Radiation Test Results Demonstrating Operate-through Capability of an ESA Application Using Software Mitigation on a COTS GPU

Speakers: Dr Ian Troxel (Troxel Aerospace Industries), Umut Cindemir (Unibap AB)

EDHPC2023_Unibap_Troxel_presentation_041023.pptx

11:50 Performance and Radiation testing of the Coral TPU co-processor for AI onboard satellites

Speaker: Prof. George Lentaris (University of West Attica, Greece)

Lentaris_TPU_presentationEDHPC2023.pdf

12:10 Multi-Purpose COTS-based Edge AI Computing Platform for Small Satellite Mission Optimization

Speaker: Mr Egor Tamarin (AAC Hyperion)

Multi-Purpose COTS-based Edge AI Computing Platform for Small Satellite Mission Optimization.pptm

12:30 → 14:00 Lunch

14:00 → 15:00 DFTS: Special Session #1 - Safety and Security Assessment through X-Ray Illumination

Opening remarks

Convener: Paolo Maistri

DFTS-MT-2023.pptx

14:00 Soft-SoC Robustness Evaluation using X-Rays: a Case Study and Differences with other Beams

Speaker: Luc Noizette

14:20 X ray nanoprobe for fault attacks and circuit edits on 28-nm integrated circuits

Speaker: Laurent Maingault

14:40 Simulation Methodology for Assessing X-Ray Effects on Digital Circuits

Speaker: Paolo Maistri

14:00 → 15:00 DFTS: Special Session #3 - Towards AI-based cross-layer resilience: from reliability estimation at design phase to in-field error detection and on-chip sensor data processing

Convener: Mihalis Psarakis (University of Piraeus, Greece)

14:00 Challenges in Machine Learning Techniques to Estimate Reliability from Transistors to Circuits

Speaker: Florian Klemme

14:20 On-Chip Sensors Data Collection and Analysis for SoC Health Management

Speaker: Konstantin Shibin

14:40 A Machine Learning-driven EDAC Method for Space-Application Memory

Speaker: Junchao Chen

14:00 → 16:00 Exhibition

14:00 → 16:00 Poster Session

All posters (A0 format - portrait) shall be disposed by the presenters before the session in the poster area.

14:00 A 22 nm 15 mW AI Accelerator to Enable On-Orbit Neural Network Inference for low-end CubeSats

Speakers: Mr Bert Boons (Magics Technologies NV), Mr Ehab Ibrahim (Magics Technologies NV), Dr Jaro De Roose (Magics Technologies NV), Mr Ninad Jadhav (Magics Technologies NV), Mr Stijn Hoskens (Magics Technologies NV), Dr Gert Dekkers (Magics Technologies NV), Dr Jasper Wouters (Magics Technologies NV), Dr Ying Cao (Magics Technologies NV)

14:00 A fully automated framework to accelerate Deep Learning deployment on edge devices

Speaker: Federico Fontana (AIKO S.r.l.)

14:00 Acinonyx: A Fault-tolerant High-performance Microprocessor in 28-nm FD-SOI for Long-term Space Missions

Speakers: Mr Mohamed Mounir Mahmoud (KU Leuven), Prof. Jeffrey Prinzie (KU Leuven), Prof. Paul Leroux (KU Leuven)

14:00 Characterisation of RFSoC Gen 3 data converters for satellite RF payloads

Speaker: Mr Magnus Oksbøl Therkelsen (European Space Agency)

14:00 CO2M Payload Data Handling Subsystem

Speakers: Mr Giovanni Battista De Giorgi (OHB), Mr Martin Weinert

14:00 ECSS-E-ST-50-15C update - CAN FD evaluation

Speaker: Alberto Valverde Carretero (ESA)

14:00 EDGX-1: A New Frontier in Onboard AI Computing with a Heterogeneous and Neuromorphic Design

Speaker: Nick Destrycker

EDHPC_EDGX_POSTER.pdf

14:00 Embedded cloud segmentation using AI : Back on years of experiments in orbit on OPS-SAT

Speaker: Erwann KERVENNIC (IRT Saint Exupéry)

Poster EDHPC - VFinale.pdf

14:00 End-to-end data collection, handling and processing for JUICE RPWI LP: from hardware to L1a science data products

Speaker: Ilona Benko (Swedish Institute of Space Physics)

14:00 Error Rate Estimation of DDR4-SDRAM Buffers in Space Mass Memories

Speakers: Timo Dirkes (DSI Aerospace Technologie GmbH), Christian Spindeldreier (DSI Aerospace Technologie GmbH), Kai Gruermann (DSI Aerospace Technologie GmbH), Jochen Rust (DSI Aerospace Technologie GmbH), Dr Vanessa Wyrwoll (University of Oldenburg)

14:00 ICUS – ADHA ICU System Controller Module Concept

Speaker: Malte Bargholz (ESA)

Poster_final.pdf

14:00 In Retrospect: Implementing a Custom SpaceWire Driver

Speaker: Björn Mårtensson (Swedish Institute of Space Physics)

14:00 Mytikas demonstration of NG-Ultra with DDR4 for high memory bandwidth

Speaker: Alexandre MEGE (Airbus Defence and Space)

14:00 New rad-hard high frequency PLL synthesizer IC

14:00 NG-Ultra Application Development Ecosystem

Speaker: Marion LE PENVEN

#84_poster_NGUltra_Ecosystem.pdf

14:00 On-board Control Unit for Space Experiments

Speaker: Rafał Krasa (CBK PAN)

14:00 Panorama of Airbus DS Space Products France data handling products and technologies

Speaker: Benoit Leroy

20231985_Space Electronics EDHPC_poster_A0.pdf

14:00 Payload Computer based on PolarFire SoC

Speaker: Mr Chedi Fassi (Engineering Minds Munich GmbH)

14:00 Performance Evaluation of Space-Grade FPGA Architectures

Speakers: Dr Christian Spindeldreier (DSI Aerospace Technologie GmbH), Buse Ustaoglu, Ulf Kulau (DSI Aerospace Technologie GmbH), Ole Bischoff, Jochen Rust (DSI Aerospace Technologie GmbH)

14:00 Prediction of geomagnetic events from solar wind data using Deep Learning

Speakers: Enrico Magli, Maurizio Lo Schiavo (Politecnico of Torino), Daniele Telloni (Astrophysical Observatory of Torino), Gianalfredo Nicolini (Astrophysical Observatory of Torino), Silvano Fineschi (Astrophysical Observatory of Torino)

14:00 Robust Reconfiguration of Routing Interconnection Network in APSoC Devices

Speaker: Mostafa Darvishi (Independent Researcher, Polytechnique Montreal Alumni)

14:00 Serval: A new chapter of on-board data processing with Versal ACAP-based units

Speakers: Piotr Kuligowski, Robert Czerwinski

14:00 The Radiative Transfer Equation inversion on FPGA. The case of the Photospheric Magnetic field Imager

Speaker: Dr José M. Morales Fernández (Instituto de Astrofísica de Andalucía (IAA-CSIC) and Spanish Space Solar Physics Consortium)

EDHPC_jmmf_v3.pdf

14:00 Towards a Parallel Benchmark for Space Applications: Distributing OBPMark's Image Processing

Speakers: Mahmoud M. Elbarrawy, Daniel Lüdtke

Poster_hoch_A0_EN_EDHPC_Towards a Parallel Benchmark for Space Applications Distributing OBPMark's Image Processing.pdf

14:00 YPSat’s On-Board Computer & Data Handling

Speakers: Kevin De Sousa (ESA), Magnus Oksboel Therkelsen (ESA), Suhail Nogd (European Space Agency (ESA))

15:00 → 16:00 DFTS: Special Session #2 - Reliability of Microcontrollers in Radiation Harsh Environment at Different Levels of Abstraction. The Case Study of the HARV RISC-V SoC

Opening remarks

Convener: Luigi Di Lillo

DFTS-MT-2023.pptx

15:00 Characterization of a Fault-Tolerant RISC-V System-on-Chip for Space Environments

Speaker: Andre Martins Pio d Mattos

15:20 Implementation and Reliability Evaluation of a Vector Extension for a RISC-V System-on-Chip

Speaker: Carolina Imianosky

15:40 Hardening a Real-Time Operating System for a Dependable RISC-V System-on-Chip

Speaker: Douglas Almeida dos Santos

15:00 → 16:00 DFTS: Special Session #4 - Resilience of Brain-Inspired Applications: Test and Reliability for Modern ML and AI Hardware Implementations

Conveners: Elena-Ioana Vatajelu, Ernesto Sanchez

15:00 Testing and Reliability of Spiking Neural Networks: A Review of the State-of-the-Art

Speaker: Haralampos Stratigopoulos

15:20 On the resilience of representative and novel data formats in CNNs

Speaker: Edgar Sanchez Sanchez

15:40 Fault tolerance of memristor-based neural networks: a comparative study between formal and spiking neural networks

Speaker: Elena-Ioana Vatajelu

16:00 → 19:00 Social Event: Visit of Juan Les Pins + visit Antibes - Departure at 16:00 from registration desk

19:00 → 20:30 Gala Cocktail + Group picture

20:30 → 23:30 Gala Dinner + EDHPC/DFTS announcement, Gala Dinner Sponsor announcements: Airbus DS (Mr Laurent BEUGNET) and OHB Systems (Mr Joseph DUNCAN).

Welcome by Ali Zadeh (ESA), Few words about the EDHPC (Mr Olivier Mourra, Mrs Milena Van Schendel) and DFTS (Marco Ottavi, Gianluca Furano)

Wednesday evening, during the gala dinner - announcement of Airbus DS (Gala Dinner Sponsor)
Verbal gratitude during the gala dinner (Mr Olivier Mourra)
Introduction (15 minutes) of the company at the gala diner by Mr Laurent Beugnet

Wednesday evening, during the gala dinner - announcement of OHB Systems (Gala Dinner Sponsor)
Verbal gratitude during the gala dinner (Mr Ali Zadeh)
Introduction (15 minutes) of the company at the gala diner by Mr Joseph Duncan

Thursday 5 October

09:00 → 10:20 DFTS: Keynote 3: State of the Art of Functional Safety in 2023

Conveners: Luca Cassano (Dipartimento di Elettronica, Informatica e Bioingegneria - Politecnico di Milano), Mauro Pipponzi

09:00 → 10:20 Exhibition

09:00 → 10:20 Session 15 - OBDP: Methodologies for On-Board Machine Learning

Conveners: Nick Panagiotopoulos (European Space Agency), Laurent Hili (ESA), Pablo Ghiglino

09:00 A Hitchhiker’s Guide to Neural Network Design for Onboard Deployment in Space

Speaker: Wouter Benoot (Edgise)

EDHPC Presentation.ppsx

09:20 Efficient In-Orbit CNN Updates

Speaker: Dr Aubrey Dunne (Ubotica Technologies)

EDHPC 2023 - ENU V2.1.pptx

09:40 Enhanced Computational Storage Device-based Artificial Intelligence-Triage subsystem

Speakers: Ms Besma Guesmi (Ubotica), Dr Jose Luis Espinosa-Aranda (Ubotica)

EDHPC23-3CSD.pptx

10:00 Low-Precision Floating-Point for Efficient On-Board Deep Neural Network Processing

Speaker: Mr Cédric GERNIGON (INRIA)

gernigon_cedric_EDHPC2023.pdf

09:00 → 10:00 Session 16 - OBDH Hardware: New Developments in ICUs & DPUs - Part 1

Conveners: Dr Maris Tali (ESA), David Gonzalez-Arjona (GMV Aerospace and Defence)

09:00 Olympe NG-Ultra based processor board demonstrator test results and lessons learnt

Speaker: Mr Matthieu Nouard (AIRBUS DEFENCE AND SPACE)

ESA_EDHPC_ID110_v1.2.pdf

09:20 picoRTU-System: Distributed, Modular, Intelligent Remote Terminal Unit System

Speaker: Jernej Haložan (SkyLabs d.o.o.)

ECHPC2023_picoRTU-System Distributed_Modular_Intelligent_Remote_Terminal_Unit_System - v2.pdf

09:40 SmallSat payload Control and Data Processing unit

Speaker: Dr Gerard Rauwerda (Technolution B.V.)

Technolution_SmallSat-payload-CDPU_1v0_small.pdf

09:00 → 10:20 Session 17 - Buses, networks & protocols - Part I

Conveners: Dr Christian Spindeldreier (DSI Aerospace GmbH), Fabio Malatesta (Frontgrade Gaisler AB), Dr Felix Siegle (ESA-ESTEC)

09:00 Software Based Routing on Satellites - Redundant IP Packet Routing Architecture on Commercial Hardware with Traffic Prioritization

Speaker: Joshua Schüler (Tesat-Spacecom GmbH & Co. KG)

09:20 Photonic Digital Data Handling at Airbus: From High End Definition to Component Technologies

Speaker: Tania Antonini

EDHPC_Photonic Digital Data Handling at Airbus_Presentation.pdf

09:40 Proposal and Investigation of a Next Generation Launcher Communication System Based on Time Sensitive Networking Technology

Speakers: Mr David Modroño Maeztu (System-on-Chip Engineering S.L. (SoC-e)), Mr Leonardo Favilli (Avio)

EDHPC_2023_Avio&SoC-e_230926_final.pdf

10:00 SpaceWire/SpaceFibre Analyser Real-Time (SpaceART) system extension to the Wizardlink Protocol

Speaker: Gionata Benelli (IngeniArs)

10:20 → 10:50 Coffee Break sponsored by Thales Alenia Space - FR (Gold Sponsor) - Verbal gratitude at the start of the coffee break by Mr Olivier Mourra (ESA) - Announcement by Mr. Pierre Dandré from Thales Alenia Space - FR

10:50 → 12:30 DFTS: Session 4: Radiation, Soft Errors and Security

Convener: Paolo Maistri

10:50 Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs., Kevin Böhmer, Bruno Forlin, Carlo Cazzaniga, Paolo Rech, Gianluca Furano, Nikolaos Alachiotis and Marco Ottavi

Speaker: Bruno Forlin

11:10 Accurate Soft Error Rate Evaluation Using Event-Driven Dynamic Timing Analysis., Georgios-Ioannis Paliaroutis, Pelopidas Tsoumanis, Dimitrios Garyfallou, Anastasis Vagenas, Nestor Evmorfopoulos and George Stamoulis

Speaker: Dimitrios Garyfallou

11:30 Towards a Comprehensive SET Analysis Flow for VLSI Circuits using Static Timing Analysis., Christos Georgakidis, Dimitris Valiantzas, Stavros Simoglou, Iordanis Lilitsis, Nikolaos Chatzivangelis, Marko Andjelkovic, Christos Sotiriou and Milos Krstic

Speaker: Christos Georgakidis

11:50 On the Prediction of Hardware Security Properties of HLS Designs Using Graph Neural Networks., Amalia-Artemis Koufopoulou, Athanasios Papadimitriou, Aggelos Pikrakis, Mihalis Psarakis and David Hely

Speaker: Athanasios Papadimitriou

12:10 QuardTropy: Detecting and Quantifying Unauthorized Information Leakage in Hardware Designs using g-entropy., Hasan Al-Shaikh, Mohammad Bin Monjil, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor and Fahim Rahman

Speaker: Hasan Al-Shaikh

10:50 → 12:30 Exhibition

10:50 → 12:30 Session 18 - OBDP: Technologies for OBP and AI Inference Acceleration

Conveners: Guillaume Lavigne (CNES), Lucana Santos Falcon (Moltek Consultants Ltd. for European Space Agency)

10:50 GPU@SAT, the AI enabling ecosystem for on-board satellite applications

Speakers: Gionata Benelli (University of Pisa), Daniele Davalle (IngeniArs S.r.l.)

11:10 AI/ML Inference Engine Software for High-Reliability applications on Space Qualifiable Hardware

Speaker: Pablo Ghiglino

EDHPC_AI_2023_presentation.pptx

11:30 Exploring Key Aspects of Soft GPGPU Computing for On-board Acceleration of Artificial Intelligence Algorithms in Space Applications

Speaker: Dr Matteo Monopoli (University of Pisa)

EDHPC 2023 - Exploring Key Aspects of Soft GPGPU Computing for On-board Acceleration of Artificial Intelligence Algorithms in Space Applications.pptx

11:50 Reference Implementations for Machine Learning Application Benchmark

Speaker: Andreas Koch (Airbus Defence and Space)

Reference Implementations for Machine Learning Application Benchmark.pptx

12:10 Highly-Parameterised CGRA Architecture for Design Space Exploration of Machine Learning Applications Onboard Satellites

Speaker: Dr Luca Zulberti (University of Pisa)

10:50 → 12:30 Session 19 - OBDH Hardware: New Developments in On-Board Computers (OBCs)

Conveners: Mr Dario Pascucci (Thales Alenia Space), Kostas Marinis (ESA), Mr Laurent Beugnet (Airbus)

10:50 Third Generation On Board Computer within the Advanced Data & Power Management System

Speaker: Ruben Willems (Redwire Space)

EDHPC ADPMS3 OBC.pptx

11:10 Amethyst constellation OBC mass production

Speaker: Jean-Luc Poupat (Airbus)

ESA_EDHPC_ID90_Amethyst_v2.pdf

11:30 APSoC: Reconfigurable SoC-based OBC for Future Telecom Applications

Speaker: Mr Alessandro Avanzi (SITAEL S.p.A.)

2023EDHPC_Presentation_SITAEL_APSOC.pdf

11:50 OBC-Ultra, the rad-hard NG-Ultra-based On Board Computer for future applications

Speaker: Mr Adrien Comolet Tirman (AIRBUS DEFENCE AND SPACE)

ESA_EDHPC_ID92_presentation.pdf

12:10 SpaceWire Based Reconfiguration and Redundancy Management of COTS Based Highly Integrated Onboard Computer

Speaker: Prem Kumar Hari Krishnan (Evoleo Technologies GmbH)

EVODE-EDHPC2023-CHICS-SpW-Based-Reconfiguration.pptx

10:50 → 12:30 Session 20 - Buses, networks & protocols - Part II

Conveners: Pietro Nannipieri (University of Pisa), Alberto Valverde Carretero (ESA), Dr Felix Siegle (ESA-ESTEC)

10:50 A SpaceFibre Routing Switch for Distributed Payload Processing and Backplane Interconnect

Speaker: Steve Parkes (STAR-Dundee)

SpaceFibre Router Parkes EDHPC v1.pptx

11:10 Efficient High Data Rate Networking Using Remote Direct Memory Access Over SpaceFibre

Speaker: Dave Gibson (STAR-Dundee)

gibson_edhpc_2023_rdma_over_spacefibre.pptx

11:30 Advanced Ethernet Solutions for Space Applications

Speaker: Jerome Bourguignon (Microchip Technology Inc.)

2023 EDHPC - Ethernet Solutions For Space Applications_ext.pdf

11:50 Application of SpaceWire and SpaceFibre in GR765

Speaker: Mr Guillem Cabo (Frontgrade Gaisler)

Presentation_Application_of_SpaceWire_and_SpaceFibre_in_GR765.pdf

12:10 Rad-hard Repeater, Multiplexer and Switch IC for High-Speed Communication

Speakers: Alp KILIC (Nanoxplore), Edouard Lepape, Kaya Can Akyel (Nanoxplore)

20231004 EDHPC XSWITCH 16.pptx

12:30 → 14:00 Lunch

14:00 → 15:40 DFTS: Session 5: Applications and Security

Convener: Ernesto Sanchez

14:00 SASL-JTAG: A Light-Weight Dependable JTAG., Senling Wang, Shaoqi Wei, Jun Ma, Hiroshi Kai, Yoshinobu Higami, Hiroshi Takahashi, Akihiro Shimizu, Xiaoqing Wen and Tianming Ni

Speaker: Senling Wang

14:20 A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression., Wesley Grignani, Douglas Santos, Luigi Dilillo, Felipe Viel and Douglas Melo

Speaker: Luigi Di Lillo

14:40 RC-IJTAG: A Methodology for Designing Remotely-Controlled IEEE 1687 Scan Networks., Payam Habiby, Sebastian Huhn and Rolf Drechsler

Speaker: Payam Habiby

15:00 Iterative Mitigation of Insecure Resource Sharing Produced by High-level Synthesis., Zahin Ibnat, Hadi Mardani Kamali and Farimah Farahmandi

Speaker: Zahin Ibnat

15:20 Exploration of System-on-Chip Secure-Boot Vulnerability to Fault-Injection by Side-Channel Analysis., Clément Fanjas, Aboulkassimi Driss, Jessy Clédière and Simon Pontié

Speaker: Clément Fanjas

14:00 → 15:40 Exhibition

14:00 → 15:40 Session 21 - OBDP: Technologies for OBP and AI Inference Acceleration

Conveners: Guillaume Lavigne (CNES), Lucana Santos Falcon (Moltek Consultants Ltd. for European Space Agency)

14:00 High-Level Synthesis-Based On-board Payload Data Processing considering the Roofline Model

Speaker: Mrs Seungah Lee (Univ Rennes, Inria, CNRS, IRISA, France)

edhpc_Seungah_Lee_v6.pdf

14:20 Tradeoff Between Performance and Reliability in FPGA Accelerated DNNs for Space Applications

Speaker: Dr Dimitris Agiakatsikas (Space Application Services)

Tradeoff Between Performance and Reliability in FPGA Accelerated DNNs for Space Applications_v5.pdf

14:40 Analysis and Implementation of a Space Avionics Co-Processor for Deep Learning Acceleration

Speaker: David Gonzalez-Arjona (GMV Aerospace and Defence)

EDHPC_DAVIDGARJONA_DEEPLEARN ACCEL COPROC.pdf

15:00 Inference and Evaluation of Deep Convolutional Neural Networks on Microchip’s Hardware Accelerator VectorBlox

Speaker: Pietro Nannipieri (University of Pisa)

Presentation - EDHPCv2 .pdf

15:20 Towards the Extension of FPG-AI Toolflow to RNN Deployment on FPGAs for On-board Satellite Applications

Speaker: Tommaso Pacini (University of Pisa)

EDHPC_presentation.pdf

14:00 → 15:20 Session 22 - OBDH Hardware: New Developments in ICUs & DPUs - Part 2

Conveners: Mr Sybren de Jong (NLR), David Steenari (ESA), Mr Gonzalo Fernandez Berzosa (ESA)

14:00 The High-Performance Single Board Computer for Space Vehicles

Speakers: Jonas Lebram (Beyond Gravity, Sweden AB), Mr Vilhelm Geijer (Beyond Gravity Sweden AB)

EDHPC2023_The High-Performance Single Board Computer for Space Vehicles.pdf

14:20 After six months successful operations in low earth orbit: data processing system architecture and lessons learned from the LisR mission

Speaker: Konstantin Schäfer

LisR-DPU-Presentation.pdf

14:40 Redundant imaging payload data processing system based on a heterogeneous MPSoC

Speaker: Clemens Horch (Fraunhofer EMI)

EDHPC 2023 - Redundant DPU based on MPSoC - Horch

15:00 Machine Learning Space Applications using RC64 Rad Hard Manycore Processor

Speaker: Prof. Ran Ginosar (Ramon Space)

Ramon.Space EDHPC ML on RC64 2023-09-22.pptx

14:00 → 15:40 Session 23 - Buses, networks & protocols - Part III

Conveners: Mr Alberto Urbón Aguado (Telespazio for ESA), Steve Parkes (STAR-Dundee), Dr Felix Siegle (ESA-ESTEC)

14:00 A global solution for deterministic SpaceWire / SpaceFibre networks

Speaker: Dr Vangelis Kollias (TELETEL)

EDHPC_NMS_paper_presentation_021023.pptx

14:20 Time Sensitive Networking (TSN) as reliable communications bus for micro-launchers

Speaker: Carlos Domínguez (GMV)

TimeSensitiveNetworksMicrolaunchers_v2_slides.pdf

14:40 TESTING ENVIRONMENT DEDICATED FOR TSN DETERMINISTIC NETWORKING BASED ON COTS DEVICES

Speakers: Henryk Gierszal (Adam Mickiewicz University), Krzysztof Romanowski (ITTI), Mateusz Rajewski, Jarosław Kwiatkowski

presentation.pptx

15:00 IngeniArs IP Cores for on-board high-speed data interfaces

Speaker: Simone Vagaggini

15:20 Model-Based Design and Rapid Prototyping of Distributed Real-Time Applications based on Time-Triggered Ethernet

Speaker: Dr Ivan Masar (TTTech Computertechnik AG)

EDHCP_TTTech.pptx

EDHCP_TTTech.pptx

15:40 → 16:10 Coffee Break sponsored by Microchip (Gold Sponsor) - Verbal gratitude at the start of the cocktail break by Mr Kostas Marinis (ESA) and announcement by Mr. Luca Cattaneo from Microchip

16:10 → 17:10 DFTS: Special Session #5 - Testing, Reliability, and Hardware Security of Computing-in Memories

Convener: Jin-Fu Li

16:10 Testing of Computing-In Memories: Faults, Test Algorithms, and Design-for-Testability

Speaker: Jin-Fu Li

16:30 Reliability of Computing-In-Memories: Threats, Detection Methods, and Mitigation Approaches

Speaker: Yu-Guang Chen

16:50 Hardware Trojans of Computing-In-Memories: Issues and Methods

Speaker: Shih-Hsu Huang

16:10 → 17:30 Exhibition

16:10 → 17:30 Session 24 - OBDP: Technologies for On-Board Compression and Image Processing

Conveners: Lucana Santos Falcon (Moltek Consultants Ltd. for European Space Agency), Mickaël BRUNO (CNES)

16:10 A hardware/software Design Space Exploration for Efficient Video Compression on ESA missions

Speaker: Dr Yubal Barrios (Institute of Applied Microelectronics, University of Las Palmas de Gran Canaria)

EDHPC_2023_Video_v00-03.pptx

16:30 CCSDS121-based High-Performance Hardware Architecture for Real-Time Data Compression

Speaker: Mr Samuel Torres-Fau (Institute of Applied Microelectronics, University of Las Palmas de Gran Canaria)

EDHPC_Parallel121_Presentacion_v5.pptx

16:50 Towards On-Board Image Compression using Vector-Quantized Auto Encoders

Speaker: Bart Beusen (VITO)

EDHPC_VITO_beusen_final2.pptx

17:10 Evaluating the Computational Capabilities of Embedded Multicore and GPU Platforms for On-Board Image Processing

Speaker: Ivan Rodriguez-Ferrandez (Barcelona Supercomputer Center)

On_Board_Image_processing_GPUs_EDHPC-05-10-23.pptx

16:10 → 17:30 Session 25 - OBDH Hardware: New Developments in Mass-Memories

Conveners: Benoit Leroy, Dr Felix Siegle (ESA-ESTEC), Marco Rovatti (ESA-ESTEC)

16:10 Architecture Design of a High-Performance Mass Memory Unit based on Xilinx Versal FPGA for Future Space Applications

Speaker: Christian Spindeldreier (DSI Aerospace Technologie GmbH)

EDHPC-2023_ID-28_MMU-NXT.pdf

16:30 P/L Data Handling and File Management Solution for Sentinel Expansions High Performances Missions

Speakers: Ms Rita Roscigno (Thales Alenia Space), Mr Silvio Fenu (Thales Alenia Space), Mrs Anna Frosi (Thales Alenia Space S.p.A.)

16:50 Pelican: Radiation-tolerant Computational Storage

Speaker: Jason Cerundolo (Zephyr Computing Systems)

Zephyr_Pelican_SSD_EDHPC_2023.pptx

17:10 Comparing Ext4 and ZFS for Onboard Data Processing: A Systematic Mapping and Experimental Evaluation

Speakers: Ms Stephanie Liza Johansson (Dependable aerospace Student), Mr Hassan Omer Said (Dependable aerospace system Student), Dr Nandinbaatar Tsog (Embedded engineer at Unibap), Prof. Hakan Forsberg (University professor), Mr Oskar Flordal (Chief Technology Officer at Unibap)

HF_EDHPC-2023-Conference-Slides (3).pptx

HF_EDHPC-2023-Conference-Slides.pptx

16:10 → 17:30 Session 26 - Buses, networks & protocols - Part IV

Conveners: Mr Alberto Urbón Aguado (Telespazio for ESA), Dr Felix Siegle (ESA-ESTEC), Steve Parkes (STAR-Dundee)

16:10 Graph-theoretic Optimizations for Spacecraft Communications Networks

Speaker: Christopher Rose (Johns Hopkins University Applied Physics Laboratory)

graphTheory_2023.pptx

17:10 → 17:30 DFTS: Closing Session

Conveners: Gianluca Furano (ESA/Data Systems Division), Luca Cassano (Dipartimento di Elettronica, Informatica e Bioingegneria - Politecnico di Milano)

Friday 6 October

09:00 → 10:20 Exhibition

09:00 → 10:20 Session 27 - Microelectronics System-on-Chip Processors, Microcontrollers and FPGAs

Conveners: Guillaume Lavigne (CNES), Lucana Santos Falcon (Moltek Consultants Ltd. for European Space Agency)

09:00 Advancing Toward 7nm FinFET Rad-Hard FPGA for Future Space Applications

Speakers: Alp KILIC (Nanoxplore), Edouard Lepape

20231004 EDHPC 7nm roadmap.pptx

09:20 GR765: SPARC and RISC-V Multiprocessor System-on-Chip

Speaker: Mr Guillem Cabo Pitarch (Frontgrade Gaisler)

GR765_SPARC_and_RISCV_Multiprocessor_System-on-Chip-20231006.pdf

09:40 Current state and next generation of a systolic array SoC in space

Speaker: Mr Constantin Papadas (ISD)

AR_EDHPC2023_HPDP_061023 reduced.pptx

10:00 The METASAT Hardware Platform: A High-Performance Multicore, AI SIMD and GPU RISC-V Platform for On-board Processing

Speaker: Dr Leonidas Kosmidis (Barcelona Supercomputing Center)

EDHPC_METASAT_slides.pptx

09:00 → 10:20 Session 28 - OBDH Hardware: New Developments in ICUs & DPUs - Part 3

Conveners: David Steenari (ESA), Mr Mathieu Bernou (OHB Hellas)

09:00 Case-Study for Integration of COTS SoC Devices in Reliable Space Systems for On-Board Processing

Speaker: Mr Ivan Rodriguez-Ferrandez (Barcelona Supercomputer Center)

Case-Study for Integration of COTS SoC Devices - 06-10-23_V3.pptx

09:20 Design of an Edge Computing Space Board through the example of a Reference Design based on Quad ARM® Cortex®-A72 processing module

Speakers: Thomas Porchez (Teledyne e2v), Wilfrid BERTRAND (Teledyne e2v), Thomas GUILLEMAIN (Teledyne e2v)

23 09 EDHPC - Presentation - QLS1046 Space Reference Kit v1.0.pdf

09:40 Challenges for the board implementation of VERSAL ACAP on a space board

Speaker: Alexandre MEGE (Airbus Defence and Space)

#115_Challenges for VERSAL on a space board_newtemplate_0.pptx

10:00 Versal Space Reference Design : First Design-In Experiences

Speaker: Rajan Bedi (Spacechips Ltd)

Rajan Bedi ESAOBDP V1.6.pdf

09:00 → 10:20 Session 29 - Software for On-Board Data Handling and Processing

Conveners: Dr Javier Fernandez Salgado (ESA), Daniel Lüdtke (German Aerospace Center (DLR)), Malte Bargholz (ESA)

09:00 Applying Model-Based Design and Model-Based Systems Engineering for High-Level Design and Verification in Space Applications

Speakers: Mr Francisco Javier Moreno (Thales Alenia Space España), Dr Juan Manuel Rodriguez Bejarano (Thales Alenia Space), Mr Raúl Regada Alvarez (Thales Alenia Space)

TAS_in_Spain_MBD.pdf

09:20 The Application Software of the Ariel Instrument Control Unit

Speakers: Dr Sebastiano Ligori (INAF - Osservatorio Astrofisico di Torino), Dr Anna Maria Di Giorgio (Istituto Nazionale di Astrofisica), Dr Leonardo Corcione (Istituto Nazionale di Astrofisica), Dr Vito Capobianco (Istituto Nazionale di Astrofisica), Dr Donata Bonino (Istituto Nazionale di Astrofisica), Dr Focardi Mauro (Istituto Nazionale di Astrofisica), Dr Pace Emanuele (Università degli studi di Firenze)

Ligori_Ariel_ICU_ASW.pdf

09:40 Spaceflight software validation for future mission applications supported by multicore platforms

Speaker: Matteo Concas (ESA)

Spaceflight software validation for future mission applications supported by multicore platforms

10:00 On Board Data Analysis and Realtime Information System

Speaker: Dr Kurt Schwenk (DLR)

edhcp2023_odaris_presentation.pdf

10:20 → 10:50 Coffee Break

10:50 → 12:10 Exhibition

10:50 → 12:10 Session 30 - Microelectronics System-on-Chip Processors, Microcontrollers and FPGAs

Conveners: Guillaume Lavigne (CNES), Richard Jansen (ESA)

10:50 GRLIB: VHDL IP library for fault-tolerant SoC

Speakers: Fabio Malatesta (Frontgrade Gaisler AB), Mr Martin Rönnbäck (Frontgrade Gaisler)

GRLIB_VHDL_IP_library_for_fault-tolerant_SoC-20230927.pptx

11:10 GR716: LEON3 mixed-signal rad-hard microcontroller

Speakers: Fabio Malatesta (Frontgrade Gaisler AB), Jan Andersson (Gaisler), Mr Fredrik Johansson (Cobham Gaisler)

GR716_LEON3_mixed-signal_rad-hard_microcontroller-20230918.pdf

11:30 Development of the CREOLE ASIC and the Next-Generation On-Board Computer

Speakers: Mr Lennart Andersson (Beyond Gravity), Mr Vilhelm Geijer (Beyond Gravity), Mr Johas Lebram (Beyond Gravity)

Development of the CREOLE ASIC and the Next-Generation-presentation.pdf

11:50 New Space Challenges: Unique Scalable Solutions

Speaker: Simon Dumortier

2023 EDHPC - New Space Challenges by Microchip.pptx

10:50 → 11:50 Session 31 - OBDH Hardware: New Developments in ICUs & DPUs - Part 4

Conveners: David Steenari (ESA), Mr Mathieu Bernou (OHB Hellas)

10:50 NimbleAI: Designing Neuromorphic Sensors to go where Human Eyes can’t

Speaker: Dr Xabier Iturbe (Ikerlan)

NimbleAI_EDHCP.pptx

11:10 Mechanically Pumped Loop as Heatsink Solution for Advanced Onboard Data Processors

Speaker: Mr Sybren de Jong (Netherlands Aerospace Centre (NLR))

Mini-MPL_S_de_Jong_EDHPC2023.pdf

11:30 Self-Calibrating Electronic Controller for Satellite Quantum Entanglement Source

Speaker: Mr Jacek Goczkowski (Syderal POLSKA / Faculty of Electronics, Telecommunications and Informatics, Gdansk University of Technology)

Jacek_goczkowski_SECSQES.pdf

10:50 → 11:30 Session 32 - Software for On-Board Data Handling and Processing

Conveners: Dr Javier Fernandez Salgado (ESA), Daniel Lüdtke (German Aerospace Center (DLR)), Malte Bargholz (ESA)

10:50 A heterogeneous simulation platform with LEON5 and IEEE standard real-time operating system

Speaker: Mr Daichi Imazato (NEC Space Technologies, Ltd.)

EDHPC_2023_Presentation_v6.pdf

11:10 Hardware-Software co-design demonstrator for space applications on a Virtual Platform

Speakers: Mr Alberto Ferrazzi (Terma), Mattias Holm (Terma), Patricia Lopez Cueva (Thales Alenia Space)

HW_SW_SoCRocket_PatriciaLopez_EDHPC2023.pptx

12:10 → 14:00 Lunch